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On 14 November 2017 at 16:03, Alex Bradbury <asb at lowrisc.org> wrote: > Dear list, > > At the RISC-V BoF at the LLVM Dev Meeting and the longer working > session the day after, those of us working on RISC-V with LLVM decided > it would be worthwhile to schedule regular sync-up calls in order to > better co-ordinate...

On 23 November 2017 at 09:38, Alex Bradbury <asb at lowrisc.org> wrote: > On 14 November 2017 at 16:03, Alex Bradbury <asb at lowrisc.org> wrote: >> Dear list, >> >> At the RISC-V BoF at the LLVM Dev Meeting and the longer working >> session the day after, those of us working on RISC-V with LLVM decided...

Dear list, At the RISC-V BoF at the LLVM Dev Meeting and the longer working session the day after, those of us working on RISC-V with LLVM decided it would be worthwhile to schedule regular sync-up calls in order to better co-ordinate ongoing work between different developers. This is primarily to sync-up, share blocking issues and so on. I understand something similar was done during the

> > Hello CCrb users. > > Is there a way to configure Cruise Control rb to only build one > project at a time? > > I have two projects is two different repositories, and I don''t want > their builds to overlap. > > Thanks, > > Doug Bradbury > Software Craftsman > 8th Light, Inc. > blog.8thlight.com/doug

...8:39:46 -0500 from faraon.cgr.bpa.cu [172.16.24.98] ----- The following addresses had permanent fatal errors ----- <armando at mail.bpa.cu> (reason: 554 5.4.6 Too many hops) ----- Transcript of session follows ----- 554 5.4.6 Too many hops 27 (25 max): from <christopher.chan at bradbury.edu.hk> via localhost, to <armando at mail.bpa.cu> ------------------------------------------------------------------------ Reporting-MTA: dns; simbad.bpa.cu Arrival-Date: Thu, 26 Nov 2009 08:39:46 -0500 Final-Recipient: RFC822; armando at mail.bpa.cu Action: failed Status: 5.4.6 Diagno...

On Mon, Aug 28, 2017 at 8:04 AM, Alex Bradbury <asb at asbradbury.org> wrote: > On 27 August 2017 at 00:01, Alex Bradbury <asb at asbradbury.org> wrote: >> Hi all. I'm assuming most people reading this email are familiar with LLVM's >> code review process <http://llvm.org/docs/DeveloperPolicy.html#code-revi...

On Wed, 22 Jan 2020 at 19:55, Chris Lattner via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > On Jan 21, 2020, at 5:00 AM, Alex Bradbury <asb at lowrisc.org> wrote: > >> This all makes sense to me. > > > > That's correct, thanks for the feedback. > > > > I do like the idea from James of having the compiler always spit out a > > note when enabling the experimental extension, warning of...

On 18 August 2016 at 15:21, Renato Golin <renato.golin at linaro.org> wrote: > On 18 August 2016 at 14:32, Alex Bradbury <asb at asbradbury.org> wrote: >> Good question, I didn't mention buildbots in this RFC as from a quick >> look at http://lab.llvm.org:8011/builders it didn't look like >> early-stage architecture ports tend to have one, and as you say >> check-all should be be...

On Tue, 21 Jan 2020 at 01:14, Chris Lattner <clattner at nondot.org> wrote: > > On Jan 16, 2020, at 10:01 AM, Alex Bradbury via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > I believe code should be committed to LLVM when it is of sufficient > > quality, when it can be shown to benefit the LLVM user or developer > > communities, and when there is someone willing to support it. All of these can...

...imilar scheme of referring to data indirectly through a pointer, but it also changes the ABI to keep the pointer in a reserved register. -Eli From: Evandro Menezes <evandro.menezes at sifive.com> Sent: Friday, March 20, 2020 12:28 PM To: Eli Friedman <efriedma at quicinc.com> Cc: Alex Bradbury <asb at lowrisc.org>; llvm-dev <llvm-dev at lists.llvm.org> Subject: [EXT] Re: [llvm-dev] RISC-V LLVM sync-up call 19 Mar 2020 Hi, Eli. If I’m following correctly, there are two size-limited areas. One area, limited to 2GB, is the “text” area. This contains all the code. Then there...

On 21 March 2018 at 20:07, Alex Bradbury <asb at lowrisc.org> wrote: > On 23 November 2017 at 09:38, Alex Bradbury <asb at lowrisc.org> wrote: >> On 14 November 2017 at 16:03, Alex Bradbury <asb at lowrisc.org> wrote: >>> Dear list, >>> >>> At the RISC-V BoF at the LLVM Dev Meeting and...

...pact model can do it in one instruction for the first 500 (?) entries in the GOT. Not sure what would end up with smaller codesize in practice. -Eli From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Evandro Menezes via llvm-dev Sent: Thursday, March 19, 2020 9:19 AM To: Alex Bradbury <asb at lowrisc.org> Cc: llvm-dev <llvm-dev at lists.llvm.org> Subject: [EXT] Re: [llvm-dev] RISC-V LLVM sync-up call 19 Mar 2020 Here's the draft proposal for the compact code model on RV. I'd appreciate your feedback before I propose it to the foundation and go about updatin...

On 11 May 2014 13:25, Alex Bradbury <asb at asbradbury.org> wrote: > On 6 May 2014 09:42, Jay Foad <jay.foad at gmail.com> wrote: >> I followed a link from LLVM Weekly to http://reviews.llvm.org/rL207598 and got: >> >> " >> Still Importing... >> >> This commit is still impor...

> On 4 Jan 2018, at 10:51, Alex Bradbury <asb at lowrisc.org> wrote: > > On 4 January 2018 at 17:10, Daniel Sanders via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >>> On 3 Jan 2018, at 14:00, Alex Bradbury via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> I haven't dug into the GlobalIS...

On 18 August 2016 at 00:08, Renato Golin <renato.golin at linaro.org> wrote: > On 17 August 2016 at 10:14, Alex Bradbury via llvm-dev >> * Codegen >> * Compressed instruction set support (RVC) >> * Benchmarking and comparison to GCC RISC-V (and potentially other archs) > > What about buildbots? > > I'm assuming "check-all" would be enough for now, but you'll have to &gt...

On 30 Jan 2018, at 19:56, Alex Bradbury via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Is this bad style? It seems the current codebase is inconsistent on > this point. The upside of such duplication is that it reduces the need > to cross-reference to other files when using a dumb editor. I generally use the ren...

...n support with a goal of getting them committed once of a sufficient quality. # Credits Thanks for input from Sam Elliott and Luís Marques on the lowRISC toolchain team, and for participants of the RISC-V sync-up call for initial feedback (especially Robin Kruppe and Evandro Menezes). Best, Alex Bradbury, CTO and Co-founder, lowRISC CIC

...r, you can read a HTML version of this email at <http://llvmweekly.org/issue/189>. Welcome to the one hundred and eighty-ninth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by [Alex Bradbury](http://asbradbury.org). Subscribe to future issues at <http://llvmweekly.org> and pass it on to anyone else you think may be interested. Please send any tips or feedback to <asb at asbradbury.org>, or @llvmweekly or @asbradbury on Twitter. ## News and articles from around the web If...

I just want to say that I really, really, appreciate the information given on this site: http://qaweb.dev.centos.org/qa/calendar -- *** E-Mail is NOT a SECURE channel *** James B. Byrne mailto:ByrneJB at Harte-Lyne.ca Harte & Lyne Limited http://www.harte-lyne.ca 9 Brockley Drive vox: +1 905 561 1241 Hamilton, Ontario fax:

On 4 January 2018 at 17:10, Daniel Sanders via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> On 3 Jan 2018, at 14:00, Alex Bradbury via llvm-dev <llvm-dev at lists.llvm.org> wrote: > I haven't dug into the GlobalISel calling convention code much but I can comment on the MipsCCState. Thanks for the insight Daniel, much appreciated. >> * MipsCCState: adds bool vectors OriginalArgWasF128, OriginalArgWasFloat,...