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Hi Anitha, Thanks for your answer but -mcpu=cortex-a9 -mattr=+vfp4 doesn' t enable fused mac generation for me. I would like just to understand why -mtriple=armv7-eabi enables it while -mcpu=cortex-a9 seems to disable it ? Seb > -----Original Message----- > From: Anitha Boyapati [mailto:anitha.boyapati at gmail.com] > Sent: Thursday, November 08, 2012 10:22 AM > To: Sebastien DELDON-GNB > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > On 8 November 2012 13:56, Sebastien DELDON-GNB > <sebastien.deldon at st.com...

...STEricsson Novathor with Linaro, code works. It also works when I use LLVM to generate fma (using llc -mtriple=armv7-eabi). Maybe someone from ARM can answer the question ? Seb From: JF Bastien [mailto:jfb at google.com] Sent: Friday, November 09, 2012 5:36 PM To: Sebastien DELDON-GNB Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] fmac generation for cortex-a9 AFAIK A9 doesn't have VFPv4 or AdvSIMDv2, so it doesn't have VFMA. I don't know what LLVM does, but it shouldn't emit VFMA when you target A9. VMLA isn't a fused multiply-add, it's a multiply follo...

...your answer but -mcpu=cortex-a9 -mattr=+vfp4 doesn' t enable > fused mac generation for me. > I would like just to understand why -mtriple=armv7-eabi enables it while > -mcpu=cortex-a9 seems to disable it ? > > Seb > > > -----Original Message----- > > From: Anitha Boyapati [mailto:anitha.boyapati at gmail.com] > > Sent: Thursday, November 08, 2012 10:22 AM > > To: Sebastien DELDON-GNB > > Cc: llvmdev at cs.uiuc.edu > > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > > > On 8 November 2012 13:56, Sebastien DELDON-GNB > &...

...rmv7-eabi). Maybe someone from ARM can answer > the question ? > > > > > > > > Seb > > > > > > > > From: JF Bastien [mailto:jfb at google.com] > > Sent: Friday, November 09, 2012 5:36 PM > > To: Sebastien DELDON-GNB > > Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu > > > > > > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > > > > > > > AFAIK A9 doesn't have VFPv4 or AdvSIMDv2, so it doesn't have VFMA. I > > don't know what LLVM does, but it shouldn't emit VFMA whe...

On 8 November 2012 11:12, Cameron McInally <cameron.mcinally at nyu.edu> wrote: > On Wed, Nov 7, 2012 at 10:52 PM, Anitha Boyapati <anitha.boyapati at gmail.com> > wrote: > ... >> >> For the multiclass "fma4s", why is "mr" not inherited from "VEX_W" and >> "MemOp4" like those of "rm" or "rr" ? > > > Hey Anitha, > > The VEX....

Are you still having issues with FMA4? I wonder if PR15040 is related. A fix was just committed. On Wed, Nov 7, 2012 at 3:22 AM, Anitha Boyapati <anitha.boyapati at gmail.com>wrote: > > > On 7 November 2012 15:29, Duncan Sands <baldrick at free.fr> wrote: > >> >> That way the output should be exactly the same as the output dragonegg >> would >> normally run the LLVM optimizers on, e.g. GCC co...

...> fix was just committed. It seems to be so! I will look into it immediately. Apologies for the late e-mail. I ran out of time devoted for this PR and moved on. Coincidentally, only today I came back to this PR for further debugging. Thanks! > > On Wed, Nov 7, 2012 at 3:22 AM, Anitha Boyapati > <anitha.boyapati at gmail.com> wrote: >> >> >> >> On 7 November 2012 15:29, Duncan Sands <baldrick at free.fr> wrote: >>> >>> >>> That way the output should be exactly the same as the output dragonegg >>> would >>&gt...

...s when I use LLVM to generate fma (using llc > –mtriple=armv7-eabi). Maybe someone from ARM can answer the question ? > > > > Seb > > > > From: JF Bastien [mailto:jfb at google.com] > Sent: Friday, November 09, 2012 5:36 PM > To: Sebastien DELDON-GNB > Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu > > > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > > > AFAIK A9 doesn't have VFPv4 or AdvSIMDv2, so it doesn't have VFMA. I don't > know what LLVM does, but it shouldn't emit VFMA when you target A9. VMLA > isn't a f...

...question ? > > > > > > > > > > > > Seb > > > > > > > > > > > > From: JF Bastien [mailto:jfb at google.com] > > > Sent: Friday, November 09, 2012 5:36 PM > > > To: Sebastien DELDON-GNB > > > Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu > > > > > > > > > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > > > > > > > > > > > AFAIK A9 doesn't have VFPv4 or AdvSIMDv2, so it doesn't have VFMA. I > > > don't know what LLVM...

On 11 March 2013 10:06, Anitha B Gollamudi <anitha.boyapati at gmail.com> wrote: > On 23 January 2013 00:20, Craig Topper <craig.topper at gmail.com> wrote: >> >> Are you still having issues with FMA4? I wonder if PR15040 is related. A >> fix was just committed. Unfortunately r173176 does not fix this. I have updated the trunk...

On Thu, Nov 8, 2012 at 1:34 AM, Anitha Boyapati <anitha.boyapati at gmail.com>wrote: ... > > I actually have confusion in mapping the role of vex_w during > instruction selection. For the moment, lets just consider vex_w and > not memop. > > [1]. What does " def rr : FMA4<>, VEX_W" mean? As per tablegen &g...

On Wed, Nov 7, 2012 at 10:52 PM, Anitha Boyapati <anitha.boyapati at gmail.com>wrote: ... > For the multiclass "fma4s", why is "mr" not inherited from "VEX_W" and > "MemOp4" like those of "rm" or "rr" ? > Hey Anitha, The VEX.W bit is used to denote operand order. In oth...

Can you send the binaries compiled with and without the integrated assembler. Maybe I can figure out the encoding problem. I've been unsuccessful figuring it out myself so far. On Tue, Mar 12, 2013 at 12:34 AM, Anitha B Gollamudi < anitha.boyapati at gmail.com> wrote: > On 12 March 2013 09:51, Craig Topper <craig.topper at gmail.com> wrote: > > I'm still slightly confused. Is the error now fixed or is there still a > bug > > in LLVM's integrated assembler? > > > > The error is not fixed yet (ev...

Hi, A question from r162999 changes: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFMA.td?r1=162999&r2=162998&pathrev=162999 For the multiclass "fma4s", why is "mr" not inherited from "VEX_W" and "MemOp4" like those of "rm" or "rr" ? multiclass fma4s< > ... def mr : FMA4<opc, MRMSrcMem, (outs

I'm still slightly confused. Is the error now fixed or is there still a bug in LLVM's integrated assembler? On Mon, Mar 11, 2013 at 4:49 AM, Anitha B Gollamudi < anitha.boyapati at gmail.com> wrote: > On 11 March 2013 17:00, Duncan Sands <baldrick at free.fr> wrote: > > Hi Anitha, > > > > > >> Ah, I am taking back my above words w.r.t encoding. -no-integrated-as > >> does fix the issue! This definitely points towards FMA4 en...

On 7 November 2012 15:29, Duncan Sands <baldrick at free.fr> wrote: > > That way the output should be exactly the same as the output dragonegg > would > normally run the LLVM optimizers on, e.g. GCC constant folding and other > such > optimizations which get turned on at -O2 will still have happened > (dragonegg > turns off almost all GCC optimizations by default,

On 20 November 2012 15:10, Anitha B Gollamudi <anitha.boyapati at gmail.com> wrote: > Hi > > I am seeing an issue (compiled application seg faults) when llc is > used at -O1. I first need to triage out which optimization/pass is > responsible for the seg fault. As such I am following this strategy: > disable gradually those passes at -O1 w...

...RM can answer > the question ? > > > > > > > > Seb > > > > > > > > From: JF Bastien [mailto:jfb at google.com<mailto:jfb at google.com>] > > Sent: Friday, November 09, 2012 5:36 PM > > To: Sebastien DELDON-GNB > > Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu<mailto:llvmdev at cs.uiuc.edu> > > > > > > Subject: Re: [LLVMdev] fmac generation for cortex-a9 > > > > > > > > AFAIK A9 doesn't have VFPv4 or AdvSIMDv2, so it doesn't have VFMA. I > > don't know what LLVM doe...

...://llvm.org/bugs/show_bug.cgi?id=15282 does not fix the gromacs miscompare error either. However -no-integrated-as helps in all cases. I am not sure if r173176 is incomplete or the issue is something else. -Anitha > > On Mon, Mar 11, 2013 at 4:49 AM, Anitha B Gollamudi > <anitha.boyapati at gmail.com> wrote: >> >> On 11 March 2013 17:00, Duncan Sands <baldrick at free.fr> wrote: >> > Hi Anitha, >> > >> > >> >> Ah, I am taking back my above words w.r.t encoding. -no-integrated-as >> >> does fix the issue! This d...

On 16 November 2012 13:41, Anitha B Gollamudi <anitha.boyapati at gmail.com> wrote: > Hi, > > I have a simple question w.r.t the order of operands used in dag > pattern matching in target files. Some of them seem intuitive. But I > want to get it clarified anyway. I am using a pattern from > X86InstrFMA.td in the below example. Consider FM...