search for: borja

Displaying 20 results from an estimated 163 matches for "borja".

2010 Jul 26
3
Cluster analysis
Hi all, I have no idea if this question is to easy to be answered, but I?m starting with R. So, here we go. I have a large dataset with a lot of steps a judicial case. A sample is attached. I?d like to do a cluster analysis to try to understand with one is the most usual path followed by this legal cases. After that, I?d like to plot a cluster tree. In the attached sample, the column: -
2012 Jul 14
2
[LLVMdev] Issue with Machine Verifier and earlyclobber
...y other debug info you need. I haven't pasted the regalloc debug info here because it is quite huge, but if you tell me what specific details you need I will include them. Thanks for your help! 2012/7/14 Jakob Stoklund Olesen <stoklund at 2pi.dk> > > On Jul 14, 2012, at 10:09 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > > > Hello, > > > > I'm getting a machine verifier error after introducing the earlyclobber > constraint to some instructions where the src and dest regs can't be the > same. The offending instruction pattern is this...
2013 Jan 07
2
[LLVMdev] LLVM ERROR: ran out of registers during register allocation
Hello Jakob, Did you get a chance to take a look into this, and if not, can you do it when you get some spare time? Thanks! 2012/12/19 Borja Ferrer <borja.ferav at gmail.com> > We did something like this back when the register allocator couldn't split >> live ranges. >> > > Yes, I remember the isWinToJoinCrossClass() function, removed here: > > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Code...
2012 Jul 15
0
[LLVMdev] Issue with Machine Verifier and earlyclobber
Jakob, one more hint, I've placed some asserts around the code you added and noticed that the InlineSpiller::insertReload() function is not being called. 2012/7/14 Borja Ferrer <borja.ferav at gmail.com> > Hello Jakob, > > I'm still getting the error, I can give you any other debug info you need. > I haven't pasted the regalloc debug info here because it is quite huge, but > if you tell me what specific details you need I will include...
2013 Jan 07
0
[LLVMdev] LLVM ERROR: ran out of registers during register allocation
On Jan 7, 2013, at 4:58 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Hello Jakob, > > Did you get a chance to take a look into this, and if not, can you do it when you get some spare time? It's not likely I'll have time to look at this in the near future. I'd recommend you do it yourself. /jak...
2007 Oct 08
6
stub actions that depend on the parameter
Hi, I''m pretty new to all related to bdd and rspec and I have the following question. Is it possible to stub actions that return different objects depending on the parameteres they were called with? Something like this: MyClass.stub!(:method).with(1).and_return(@mock_object_1) MyClass.stub!(:method).with(2).and_return(@mock_object_2) I know I could use
2013 Jan 09
2
[LLVMdev] LLVM ERROR: ran out of registers during register allocation
...In either case, in the meantime, I can live with this workaround until an official fix is implemented. I'll fill in a bug report to track this problem so you can take a look at it when appropiate. 2013/1/7 Jakob Stoklund Olesen <stoklund at 2pi.dk> > > On Jan 7, 2013, at 4:58 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > > Hello Jakob, > > Did you get a chance to take a look into this, and if not, can you do it > when you get some spare time? > > > It's not likely I'll have time to look at this in the near future. I'd > recommen...
2013 Jul 09
2
OCZ Vertex4 quirks
.../sisters, it's optimized for 4 KB blocks. /* * OCZ Vertex 4 SSDs * 4k optimized */ { T_DIRECT, SIP_MEDIA_FIXED, "ATA", "OCZ_VERTEX4*", "*"}, /*quirks/DA_Q_4K Borja.
2008 Dec 20
2
Print a list in columns
Dear R-Users I have a list with two vectors of doubles tha have different lengths. I want to export it to a file and I also want to print it in two columns. I try with write.table but it need vectors of the same length. Does anyone know how to do it? Thanks Borja [[alternative HTML version deleted]]
2012 Jul 15
2
[LLVMdev] Issue with Machine Verifier and earlyclobber
On Jul 15, 2012, at 9:20 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Jakob, one more hint, I've placed some asserts around the code you added and noticed that the InlineSpiller::insertReload() function is not being called. > > 2012/7/14 Borja Ferrer <borja.ferav at gmail.com> > Hello Jakob, &gt...
2010 Dec 30
0
[LLVMdev] Original data type after DAG legalization
Hello everybody, During the past week I've kept looking for a solution to this but i couldn't find one, is there really a way to get this type of information or some workaround? Thanks. 2010/12/22 Borja Ferrer <borja.ferav at gmail.com> > Hello, > > Is there a way to determine before register allocation if a virtual reg is > mapped to the lo or hi part of a piece of a value? Basically i need to tell > the register allocator to use a certain set of registers for the lo part an...
2013 Jul 24
3
Levels of a factor
...lly in the factor. For example I would have this: > vector <- dataset$Benchmark > class(vector) [1] "factor" > length(vector) [1] 35615 > vector2 <- levels(vector) > length(which(!(vector2 %in% vector))) [1] 235 Does anyone know how this is possible? Many thanks! Borja [[alternative HTML version deleted]]
2010 Dec 22
3
[LLVMdev] Original data type after DAG legalization
Hello, Is there a way to determine before register allocation if a virtual reg is mapped to the lo or hi part of a piece of a value? Basically i need to tell the register allocator to use a certain set of registers for the lo part and others for the hi part, so in order to do this i would have to know if the data value was expanded into smaller pieces and which piece is each one. Additionally,
2008 Oct 22
2
Weibull parameter estimation
...-users I would like to fit weibull parameters using "Method of moments" in order to provide the inital values of the parameter to de function 'fitdistr' . I don`t have much experience with maths and I don't know how to do it. Can anyone please put me in the rigth direction? Borja [[alternative HTML version deleted]]
2008 Dec 11
1
Complex integration in R
...integration. My function is: aprox2=function(s,x,rate){ dexp(x,rate)*exp(-s*x) } where argument s is a complex number. I can't use the integrate function because it's only used with "numeric" arguments Does anyone know some function to approximate complex integrals? Thanks Borja [[alternative HTML version deleted]]
2013 Jan 09
0
[LLVMdev] LLVM ERROR: ran out of registers during register allocation
On Jan 9, 2013, at 10:46 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Ok, I've found that marking tiny live intervals as not spillable inside VirtRegAuxInfo::CalculateWeightAndHint is not playing nicely with very constrained regclasses, in my case a regclass composed of only one register. > As a workaround,...
2012 Jul 14
0
[LLVMdev] Issue with Machine Verifier and earlyclobber
On Jul 14, 2012, at 10:09 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Hello, > > I'm getting a machine verifier error after introducing the earlyclobber constraint to some instructions where the src and dest regs can't be the same. The offending instruction pattern is this one: > > let canFold...
2006 May 03
1
MAC policies and shared hosting
...e launching a CGI process. And perhaps it wouldn't be so hard to modify an existing webserver so that it changed the uid when serving a page associated with a virtual server, adding a uid parameter to virtual servers. What do you think? Ideas? (This is only a quick and dirty idea) Borja.
2012 Dec 19
2
[LLVMdev] LLVM ERROR: ran out of registers during register allocation
On Dec 19, 2012, at 8:58 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Hello Jakob, > > I think I've found something interesting that may help you get a better idea of what's going on. > > While looking at the debug info I noticed that the coalescer was removing lots of copies that could help t...
2012 Jul 14
2
[LLVMdev] Issue with Machine Verifier and earlyclobber
Hello, I'm getting a machine verifier error after introducing the earlyclobber constraint to some instructions where the src and dest regs can't be the same. The offending instruction pattern is this one: let canFoldAsLoad = 1, isReMaterializable = 1, Constraints = "@earlyclobber $dst" in def LDDWRdPtrQ : Inst<(outs DREGS:$dst), (ins memri:$src),