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...KM_CLK_DOM_FLAG_CORE 0x01 > +#define NVKM_CLK_DOM_FLAG_BASE_CLOCK_CORE 0x02 > u8 flags; > const char *mname; > int mdiv; > @@ -94,6 +95,13 @@ struct nvkm_clk { > int dstate; /* display adjustment (min+) */ > > bool allow_reclock; > +#define NVKM_CLK_BOOST_MODE_NONE 0x0 > +#define NVKM_CLK_BOOST_MODE_AVG 0x1 > +#define NVKM_CLK_BOOST_MODE_FULL 0x2 > + u8 boost_mode; > + > + u32 base_clock; > + u32 boost_clock; > > /*XXX: die, these are here *only* to support the completely > * bat-shit insane what-was-nouveau_hw.c c...

...01 > > +#define NVKM_CLK_DOM_FLAG_BASE_CLOCK_CORE 0x02 > > u8 flags; > > const char *mname; > > int mdiv; > > @@ -94,6 +95,13 @@ struct nvkm_clk { > > int dstate; /* display adjustment (min+) */ > > > > bool allow_reclock; > > +#define NVKM_CLK_BOOST_MODE_NONE 0x0 > > +#define NVKM_CLK_BOOST_MODE_AVG 0x1 > > +#define NVKM_CLK_BOOST_MODE_FULL 0x2 > > + u8 boost_mode; > > + > > + u32 base_clock; > > + u32 boost_clock; > > > > /*XXX: die, these are here *only* to support the completely > > * bat-s...

Signed-off-by: Karol Herbst <nouveau at karolherbst.de> --- drm/nouveau/nouveau_debugfs.c | 76 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/drm/nouveau/nouveau_debugfs.c b/drm/nouveau/nouveau_debugfs.c index 3d0dc19..31b309f 100644 --- a/drm/nouveau/nouveau_debugfs.c +++ b/drm/nouveau/nouveau_debugfs.c @@ -180,6 +180,81 @@ static const struct

...efine NVKM_CLK_DOM_FLAG_CORE 0x01 +#define NVKM_CLK_DOM_FLAG_CORE 0x01 +#define NVKM_CLK_DOM_FLAG_BASE_CLOCK_CORE 0x02 u8 flags; const char *mname; int mdiv; @@ -94,6 +95,13 @@ struct nvkm_clk { int dstate; /* display adjustment (min+) */ bool allow_reclock; +#define NVKM_CLK_BOOST_MODE_NONE 0x0 +#define NVKM_CLK_BOOST_MODE_AVG 0x1 +#define NVKM_CLK_BOOST_MODE_FULL 0x2 + u8 boost_mode; + + u32 base_clock; + u32 boost_clock; /*XXX: die, these are here *only* to support the completely * bat-shit insane what-was-nouveau_hw.c code diff --git a/drm/nouveau/nvkm/subdev/clk/...

this series solves different issues we encounter on kepler cards while reclocking: 1. core clock doesn't change at all and produces a volting error (patch 1) this can happen when the voltage table has only 0ed values in the header so we have to parse the entries itself, which contain the right voltages 2. kepler won't clock to highest cstates (patch 2) this happens, because there are

...01 +#define NVKM_CLK_DOM_FLAG_BASECLK 0x02 u8 flags; const char *mname; int mdiv; @@ -97,6 +98,12 @@ struct nvkm_clk { int dstate; /* display adjustment (min+) */ bool allow_reclock; +#define NVKM_CLK_BOOST_NONE 0x0 +#define NVKM_CLK_BOOST_AVG 0x1 +#define NVKM_CLK_BOOST_FULL 0x2 + u8 boost_mode; + u32 base_khz; + u32 boost_khz; /*XXX: die, these are here *only* to support the completely * bat-shit insane what-was-nouveau_hw.c code diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c index 4928668..d575412 100644 --- a/drm/nouveau/nvkm/subdev/clk...

...01 +#define NVKM_CLK_DOM_FLAG_BASECLK 0x02 u8 flags; const char *mname; int mdiv; @@ -98,6 +99,12 @@ struct nvkm_clk { int dstate; /* display adjustment (min+) */ bool allow_reclock; +#define NVKM_CLK_BOOST_NONE 0x0 +#define NVKM_CLK_BOOST_AVG 0x1 +#define NVKM_CLK_BOOST_FULL 0x2 + u8 boost_mode; + u32 base_khz; + u32 boost_khz; /*XXX: die, these are here *only* to support the completely * bat-shit insane what-was-nouveau_hw.c code diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c index 21f6369..a9a3666 100644 --- a/drm/nouveau/nvkm/subdev/clk...

this series solves different issues we encounter on kepler cards while reclocking: 1. core clock doesn't change at all and produces a volting error (patch 1) this can happen when the voltage table has only 0ed values in the header so we have to parse the entries itself, which contain the right voltages 2. kepler won't clock to highest cstates (patch 2) this happens, because there are

...} > + > int > nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, > int index, bool allow_reclock, struct nvkm_clk *clk) > @@ -743,6 +782,9 @@ nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, > > clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost", > NVKM_CLK_BOOST_NONE); > + > + nvkm_clk_parse_max_temp(clk); > + > return 0; > } > > -- > 2.13.2 > > _______________________________________________ > N...

...p); > +} > + > int > nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, > int index, bool allow_reclock, struct nvkm_clk *clk) > @@ -733,6 +772,9 @@ nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, > > clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost", > NVKM_CLK_BOOST_NONE); > + > + nvkm_clk_parse_max_temp(clk); > + > return 0; > } > > -- > 2.14.1 > > _______________________________________________ > Nouveau mailing list > Nouveau at...

...c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drm/nouveau/include/nvkm/subdev/clk.h b/drm/nouveau/include/nvkm/subdev/clk.h index 99ee05c..61d99fd 100644 --- a/drm/nouveau/include/nvkm/subdev/clk.h +++ b/drm/nouveau/include/nvkm/subdev/clk.h @@ -105,6 +105,7 @@ struct nvkm_clk { u8 boost_mode; u32 base_khz; u32 boost_khz; + u32 max_khz; /*XXX: die, these are here *only* to support the completely * bat-shit insane what-was-nouveau_hw.c code diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c index a9a3666..1ca25dd 100644 --- a/drm/nouveau/...

...clk->max_temp, clk->relax_temp); +} + int nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, int index, bool allow_reclock, struct nvkm_clk *clk) @@ -743,6 +782,9 @@ nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost", NVKM_CLK_BOOST_NONE); + + nvkm_clk_parse_max_temp(clk); + return 0; } -- 2.13.2

...clk->max_temp, clk->relax_temp); +} + int nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, int index, bool allow_reclock, struct nvkm_clk *clk) @@ -733,6 +772,9 @@ nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost", NVKM_CLK_BOOST_NONE); + + nvkm_clk_parse_max_temp(clk); + return 0; } -- 2.14.1

This series fixes most of the issues regarding volting on GPUs with any form of GPU Boost inside their vbios, which is mainly Kepler and newer, but we find some boosting related tables in Fermi vbios' already In the end reclocking should work on most Kepler cards without any issues v2: boost_mode can now be changed at runtime minor fixups Karol Herbst (22): bios/volt: handle voltage table version 0x50 with 0ed header volt: properly detect entry based voltage tables volt: save the voltage range we are able to set volt: add nvkm_volt_map_min function clk: don't create csta...

...ies for throttling thresholds clk: thermal throttling clk: Only do partial reclocks as required secboot/acr352: reset PMU after secboot device: enable clk for Maxwell2 clk: Save the max clock we can set nvif: Add boost info and set operations debugfs: Add boost interface to change the boost_mode bios/vpstate: there are some fermi vbios with no boost or tdp entry bios/vpstate: parse max battery id clk: refactor the base and boost clock limits so that we can limit pstates as well clk: implement limiting pstates just like we do for cstates clk: move the switch out of the loop i...

...e, arglen); + clk->exp_cstateid = NVKM_CLK_CSTATE_HIGHEST; + } mode = nvkm_stropt(device->cfgopt, "NvClkModeDC", &arglen); - if (mode) + if (mode) { clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen); + clk->exp_cstateid = NVKM_CLK_CSTATE_HIGHEST; + } clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost", NVKM_CLK_BOOST_NONE); -- 2.14.1

This series fixes most of the issues regarding volting on GPUs with any form of GPU Boost inside their vbios, which is mainly Kepler and newer, but we find some boosting related tables in Fermi vbios' already In the end reclocking should work on most Kepler cards without any issues Karol Herbst (19): bios/volt: handle voltage table version 0x50 with 0ed header volt: properly detect entry

...cies table therm: Cancel the timer only in fini clk: Parse thermal policies for throttling thresholds clk: Thermal throttling clk: Skip unchanging parts of the reclock clk: Save the max clock we can set nvif: Add boost info and set operations debugfs: Add boost interface to change the boost_mode bios/vpstate: Parse max battery id clk: Implement limiting pstates just like we do for cstates clk: Limit clocks on battery secboot/acr352: Reset PMU after secboot device: Enable clk for Maxwell2 clk: Add trace message when setting a new cstate drm/nouveau/include/nvif/if0001.h...

...t is set volt: don't require perfect fit bios/vmap: unk0 field is the mode volt: add coefficients I found on my gpu clk: save the max clock we can set clk: rename nvkm_pstate_calc to nvkm_clk_update nvif: add boost info and set operations debugfs: add boost interface to change the boost_mode clk: remove dstate and tstate therm: don't cancel the timer clk: make pstate a pointer to nvkm_pstate clk: hold information about the current cstate status clk: we should pass the pstate id around not the index in the list clk: only do partial reclocks as required therm: trigger...

Adds Nouveau controlled thermal throttling for Kepler+ GPUs. With this I feel safe enough to add support for Maxwell2 reclocking later on (still hidden behind a switch, but we can be fairly sure to not overheat hardware if a user isn't carefull enough) Contains all patches from my clk update series, but I thought it makes sense to include those in this series as well for completness. Please