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Hi, we have seen proper register numbers when we have generated assembly files through clang but when we generated dump files from object file then we didn't see expected register numbers. Note : all registers are replaced with R0 *Disassembly of section .text:00000000 <main>: 0: 3000ffcc addik r0, r0, -52 4: f8000000 swi r0, r0, 0 8:

Hi, *case MICROBLAZE::BGEID:* * {* * // op: raencoder* * op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);* * Value |= (op & UINT64_C(31)) << 16;* * // op: imm16* * op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); -> should be operand[1]* * Value |= op & UINT64_C(65535);* * break;* * }* I have added

Hi, I have added Branch condition BGEID like below… *def : Pat<(brcond (setcc (i32 GR32:$L), (i32 GR32:$R), SETGE), bb:$T),* * (BGEID (CMP GR32:$L, GR32:$R), bb:$T)>;* *def BGEID : TBT<0b101110, (outs), (ins GR32:$ra, brtarget:$offset), "bgeid\t$ra,$offset", [], IIC_BRc> {* * let rd = 0b10101;* *}* *def brtarget : Operand<OtherVT>* *{*