Displaying 19 results from an estimated 19 matches for "bo_flags".
2014 Sep 26
0
[RFC PATCH 6/7] drm/nouveau: Support marking buffers for explicit sync
...veau_bo.c
+++ b/drm/nouveau_bo.c
@@ -180,7 +180,7 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
int
nouveau_bo_new(struct drm_device *dev, int size, int align,
- uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,
+ uint32_t flags, uint32_t tile_mode, uint32_t bo_flags,
struct sg_table *sg,
struct nouveau_bo **pnvbo)
{
@@ -211,7 +211,7 @@ nouveau_bo_new(struct drm_device *dev, int size, int align,
INIT_LIST_HEAD(&nvbo->entry);
INIT_LIST_HEAD(&nvbo->vma_list);
nvbo->tile_mode = tile_mode;
- nvbo->tile_flags = tile_flags...
2015 Mar 14
1
[PATCH ddx] Add support for VRAM-less devices to the ddx
..._exa.c
@@ -96,11 +96,10 @@ NVC0EXAAcquireSurface2D(PixmapPtr ppix, int is_src, uint32_t fmt)
{
NVC0EXA_LOCALS(ppix);
struct nouveau_bo *bo = nouveau_pixmap_bo(ppix);
- struct nouveau_pixmap *nvpix = nouveau_pixmap(ppix);
int mthd = is_src ? NV50_2D_SRC_FORMAT : NV50_2D_DST_FORMAT;
uint32_t bo_flags;
- bo_flags = nvpix->shared ? NOUVEAU_BO_GART : NOUVEAU_BO_VRAM;
+ bo_flags = NOUVEAU_BO_APER;
bo_flags |= is_src ? NOUVEAU_BO_RD : NOUVEAU_BO_WR;
if (!nv50_style_tiled_pixmap(ppix)) {
@@ -579,7 +578,7 @@ NVC0EXAPictTexture(NVPtr pNv, PixmapPtr ppix, PicturePtr ppict, unsigned unit)
if...
2014 Sep 26
14
[RFC] Explicit synchronization for Nouveau
Hi guys,
I'd like to start a new thread about explicit fence synchronization. This time
with a Nouveau twist. :-)
First, let me define what I understand by implicit/explicit sync:
Implicit synchronization
* Fences are attached to buffers
* Kernel manages fences automatically based on buffer read/write access
Explicit synchronization
* Fences are passed around independently
* Kernel takes
2009 Dec 11
2
[PATCH 1/2] exa: Pre-G80 tiling support.
...gt;wfb_enabled) {
struct nouveau_pixmap *nvpix = nouveau_pixmap(ppix);
if (--nvpix->map_refcount)
diff --git a/src/nv50_exa.c b/src/nv50_exa.c
index 7081d72..c7609b3 100644
--- a/src/nv50_exa.c
+++ b/src/nv50_exa.c
@@ -119,7 +119,7 @@ NV50EXAAcquireSurface2D(PixmapPtr ppix, int is_src)
bo_flags = NOUVEAU_BO_VRAM;
bo_flags |= is_src ? NOUVEAU_BO_RD : NOUVEAU_BO_WR;
- if (!nouveau_exa_pixmap_is_tiled(ppix)) {
+ if (!nv50_style_tiled_pixmap(ppix)) {
BEGIN_RING(chan, eng2d, mthd, 2);
OUT_RING (chan, fmt);
OUT_RING (chan, 1);
@@ -465,7 +465,7 @@ NV50EXARenderTarget(PixmapPtr pp...
2020 Aug 13
2
[PATCH 01/20] drm/amdgpu: Introduce GEM object functions
...<drm/amdgpu_drm.h>
> #include <drm/drm_cache.h>
> #include "amdgpu.h"
> +#include "amdgpu_dma_buf.h"
> #include "amdgpu_trace.h"
> #include "amdgpu_amdkfd.h"
>
> @@ -510,6 +511,15 @@ bool amdgpu_bo_support_uswc(u64 bo_flags)
> #endif
> }
>
> +static const struct drm_gem_object_funcs amdgpu_gem_object_funcs = {
> + .free = amdgpu_gem_object_free,
> + .open = amdgpu_gem_object_open,
> + .close = amdgpu_gem_object_close,
> + .export = amdgpu_gem_prime_export,
> + .vmap = amdgpu_gem_prime...
2014 Feb 13
2
[PATCH] nouveau: fix chipset checks for nv1a by using the oclass instead
...ng RTs.*/
- if (context_chipset(ctx) < 0x17) {
+ if (context_eng3d(ctx)->oclass < NV17_3D_CLASS) {
int i;
for (i = 0; i < 6; i++) {
@@ -140,7 +140,7 @@ nv10_emit_framebuffer(struct gl_context *ctx, int emit)
PUSH_MTHDl(push, NV10_3D(ZETA_OFFSET), BUFCTX_FB,
s->bo, 0, bo_flags);
- if (context_chipset(ctx) >= 0x17) {
+ if (context_eng3d(ctx)->oclass >= NV17_3D_CLASS) {
setup_hierz_buffer(ctx);
context_dirty(ctx, ZCLEAR);
}
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_raster.c b/src/mesa/drivers/dri/nouveau/nv10_state_raster.c
index bd4a78e....
2014 Nov 19
5
[PATCH v2 0/3] nouveau: support for custom VRAM domains
This series is to allow NVIDIA chips with shared memory to operate more
efficiently (and to operate at all once we disable VRAM from the kernel
driver) by allowing nouveau_screen to specify a domain to use for objects
originally allocated into VRAM. If the domain is not overridden, the default
NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be
used in place of
2014 Nov 19
0
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
..._miptree_create(struct pipe_screen *pscreen,
if (!bo_config.nv50.memtype && (pt->bind & PIPE_BIND_SHARED))
mt->base.domain = NOUVEAU_BO_GART;
else
- mt->base.domain = NOUVEAU_BO_VRAM;
+ mt->base.domain = NV_VRAM_DOMAIN(nouveau_screen(pscreen));
bo_flags = mt->base.domain | NOUVEAU_BO_NOSNOOP;
if (mt->base.base.bind & (PIPE_BIND_CURSOR | PIPE_BIND_DISPLAY_TARGET))
@@ -401,7 +401,7 @@ nv50_miptree_from_handle(struct pipe_screen *pscreen,
FREE(mt);
return NULL;
}
- mt->base.domain = NOUVEAU_BO_VRAM;
+ mt->bas...
2014 Nov 19
1
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
...een,
> if (!bo_config.nv50.memtype && (pt->bind & PIPE_BIND_SHARED))
> mt->base.domain = NOUVEAU_BO_GART;
> else
> - mt->base.domain = NOUVEAU_BO_VRAM;
> + mt->base.domain = NV_VRAM_DOMAIN(nouveau_screen(pscreen));
>
> bo_flags = mt->base.domain | NOUVEAU_BO_NOSNOOP;
> if (mt->base.base.bind & (PIPE_BIND_CURSOR | PIPE_BIND_DISPLAY_TARGET))
> @@ -401,7 +401,7 @@ nv50_miptree_from_handle(struct pipe_screen *pscreen,
> FREE(mt);
> return NULL;
> }
> - mt->base.domain...
2020 Aug 13
0
[PATCH 01/20] drm/amdgpu: Introduce GEM object functions
...gpu_object.c
@@ -36,6 +36,7 @@
#include <drm/amdgpu_drm.h>
#include <drm/drm_cache.h>
#include "amdgpu.h"
+#include "amdgpu_dma_buf.h"
#include "amdgpu_trace.h"
#include "amdgpu_amdkfd.h"
@@ -510,6 +511,15 @@ bool amdgpu_bo_support_uswc(u64 bo_flags)
#endif
}
+static const struct drm_gem_object_funcs amdgpu_gem_object_funcs = {
+ .free = amdgpu_gem_object_free,
+ .open = amdgpu_gem_object_open,
+ .close = amdgpu_gem_object_close,
+ .export = amdgpu_gem_prime_export,
+ .vmap = amdgpu_gem_prime_vmap,
+ .vunmap = amdgpu_gem_prime_vunmap,
+};...
2014 Nov 19
1
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
...n *pscreen,
> if (!bo_config.nv50.memtype && (pt->bind & PIPE_BIND_SHARED))
> mt->base.domain = NOUVEAU_BO_GART;
> else
> - mt->base.domain = NOUVEAU_BO_VRAM;
> + mt->base.domain = NV_VRAM_DOMAIN(nouveau_screen(pscreen));
>
> bo_flags = mt->base.domain | NOUVEAU_BO_NOSNOOP;
> if (mt->base.base.bind & (PIPE_BIND_CURSOR | PIPE_BIND_DISPLAY_TARGET))
> @@ -401,7 +401,7 @@ nv50_miptree_from_handle(struct pipe_screen *pscreen,
> FREE(mt);
> return NULL;
> }
> - mt->base.domain = N...
2020 Sep 14
0
[PATCH 01/20] drm/amdgpu: Introduce GEM object functions
...m.h>
>> ? #include <drm/drm_cache.h>
>> ? #include "amdgpu.h"
>> +#include "amdgpu_dma_buf.h"
>> ? #include "amdgpu_trace.h"
>> ? #include "amdgpu_amdkfd.h"
>> ? @@ -510,6 +511,15 @@ bool amdgpu_bo_support_uswc(u64 bo_flags)
>> ? #endif
>> ? }
>> ? +static const struct drm_gem_object_funcs amdgpu_gem_object_funcs = {
>> +??? .free = amdgpu_gem_object_free,
>> +??? .open = amdgpu_gem_object_open,
>> +??? .close = amdgpu_gem_object_close,
>> +??? .export = amdgpu_gem_prime_expor...
2015 Jan 02
1
[PATCH v2] nv50: enable texture compression
On 03.01.2015 00:20, Ilia Mirkin wrote:
> On Fri, Jan 2, 2015 at 6:09 PM, Tobias Klausmann
> <tobias.johannes.klausmann at mni.thm.de> wrote:
>> We enable compression only for some supported formats
>>
>> Suggested-by: Ilia Mirkin <imirkin at alum.mit.edu>
>> Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
>> ---
2014 Oct 27
4
[PATCH 0/3] nouveau: support for custom VRAM domains
This series is to allow NVIDIA chips with shared memory to operate more
efficiently (and to operate at all once we disable VRAM from the kernel
driver) by allowing nouveau_screen to specify a domain to use for objects
originally allocated into VRAM. If the domain is not overridden, the default
NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be
used in place of
2015 Jun 19
5
[PATCH v3 0/2] nouveau: support for custom VRAM domains
New revision of this patchset that prevents VRAM objects from being
allocated on VRAM-less systems like Tegra. This is required for Mesa
to work on such systems.
Changes since v2:
- Use vram_size to detect systems without VRAM and set the correct
domain instead of expecting each chip to set its domain explicitly.
Alexandre Courbot (2):
nouveau: support for custom VRAM domains
nvc0: use
2015 Nov 26
9
[mesa 1/9] nouveau: bump required libdrm version to 2.4.66
From: Ben Skeggs <bskeggs at redhat.com>
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
configure.ac | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index 4016871..c02ee61 100644
--- a/configure.ac
+++ b/configure.ac
@@ -73,7 +73,7 @@ LIBDRM_RADEON_REQUIRED=2.4.56
LIBDRM_AMDGPU_REQUIRED=2.4.63
LIBDRM_INTEL_REQUIRED=2.4.61
2015 Dec 16
11
[mesa v3 1/9] nouveau: bump required libdrm version to 2.4.66
From: Ben Skeggs <bskeggs at redhat.com>
v2. forgot bump for non-gallium driver
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
configure.ac | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/configure.ac b/configure.ac
index b6680d0..965c6f7 100644
--- a/configure.ac
+++ b/configure.ac
@@ -72,8 +72,8 @@ LIBDRM_REQUIRED=2.4.60
2015 Nov 27
13
[mesa v2 1/9] nouveau: bump required libdrm version to 2.4.66
From: Ben Skeggs <bskeggs at redhat.com>
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
configure.ac | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index 4016871..c02ee61 100644
--- a/configure.ac
+++ b/configure.ac
@@ -73,7 +73,7 @@ LIBDRM_RADEON_REQUIRED=2.4.56
LIBDRM_AMDGPU_REQUIRED=2.4.63
LIBDRM_INTEL_REQUIRED=2.4.61
2020 Aug 13
28
[PATCH 00/20] Convert all remaining drivers to GEM object functions
The GEM and PRIME related callbacks in struct drm_driver are deprecated in
favor of GEM object functions in struct drm_gem_object_funcs. This patchset
converts the remaining drivers to object functions and removes most of the
obsolete interfaces.
Patches #1 to #18 convert DRM drivers to GEM object functions, one by one.
Each patch moves existing callbacks from struct drm_driver to an instance
of