Displaying 2 results from an estimated 2 matches for "bneid".
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bneit
2010 Dec 14
2
[LLVMdev] Branch delay slots broken.
...r3, r3, r7
beqid r3, ($BB0_3)
brid ($BB0_1)
add r19, r1, r0
add r3, r5, r0
$BB0_2:
addi r4, r3, 1
addi r7, r7, -1
add r8, r0, r0
sbi r6, r3, 0
cmp r8, r8, r7
bneid r8, ($BB0_2)
brid ($BB0_3)
add r3, r4, r0
$BB0_3:
Notice that the label $BB0_1 is missing. If I disable filling in the
branch delay slots, I get:
swi r19, r1, 0
add r19, r1, r0
add r3, r0, r0
cmp r3, r3,...
2013 Oct 03
1
[LLVMdev] Help with a Microblaze code generation problem.
...32
swi r3, r19, 60
bgtid r5, ($BB0_6)
swi r4, r19, 64
lwi r3, r19, 40
swi r3, r19, 64
$BB0_6:
lwi r3, r19, 64
lwi r4, r19, 52
lwi r5, r19, 60
swi r3, r19, 68
bneid r5, ($BB0_8)
swi r4, r19, 72
lwi r3, r19, 68
swi r3, r19, 72
$BB0_8:
lwi r3, r19, 72
add r1, r19, r0
lwi r19, r1, 4
rtsd r15, 8
addik r1, r1, 76
which is quite a bit different f...