search for: bmips

On Thu, May 31, 2018 at 09:09:24AM +0530, Anshuman Khandual wrote: > On 05/24/2018 12:51 PM, Ram Pai wrote: > > On Wed, May 23, 2018 at 09:50:02PM +0300, Michael S. Tsirkin wrote: > >> subj: s/virito/virtio/ > >> > > ..snip.. > >>> machine_subsys_initcall_sync(pseries, tce_iommu_bus_notifier_init); > >>> + > >>> +bool

On Thu, May 31, 2018 at 09:09:24AM +0530, Anshuman Khandual wrote: > On 05/24/2018 12:51 PM, Ram Pai wrote: > > On Wed, May 23, 2018 at 09:50:02PM +0300, Michael S. Tsirkin wrote: > >> subj: s/virito/virtio/ > >> > > ..snip.. > >>> machine_subsys_initcall_sync(pseries, tce_iommu_bus_notifier_init); > >>> + > >>> +bool

...damentally wrong. The DMA API does a few different things: a) address translation This does include IOMMUs. But it also includes random offsets between PCI bars and system memory that we see on various platforms. Worse so some of these offsets might be based on banks, e.g. on the broadcom bmips platform. It also deals with bitmask in physical addresses related to memory encryption like AMD SEV. I'd be really curious how for example the Intel virtio based NIC is going to work on any of those plaforms. b) coherency On many architectures DMA is not cache coherent, and we need...

...; This does include IOMMUs. But it also includes random offsets > between PCI bars and system memory that we see on various > platforms. I don't think you mean bars. That's unrelated to DMA. > Worse so some of these offsets might be based on > banks, e.g. on the broadcom bmips platform. It also deals > with bitmask in physical addresses related to memory encryption > like AMD SEV. I'd be really curious how for example the > Intel virtio based NIC is going to work on any of those > plaforms. SEV guys report that they just set the iommu flag and then...

...; This does include IOMMUs. But it also includes random offsets > between PCI bars and system memory that we see on various > platforms. I don't think you mean bars. That's unrelated to DMA. > Worse so some of these offsets might be based on > banks, e.g. on the broadcom bmips platform. It also deals > with bitmask in physical addresses related to memory encryption > like AMD SEV. I'd be really curious how for example the > Intel virtio based NIC is going to work on any of those > plaforms. SEV guys report that they just set the iommu flag and then...

...A addresses it is completely related to DMA. For some examples take a look at: arch/x86/pci/sta2x11-fixup.c arch/mips/include/asm/mach-ath25/dma-coherence.h or anything setting dma_pfn_offset. > > Worse so some of these offsets might be based on > > banks, e.g. on the broadcom bmips platform. It also deals > > with bitmask in physical addresses related to memory encryption > > like AMD SEV. I'd be really curious how for example the > > Intel virtio based NIC is going to work on any of those > > plaforms. > > SEV guys report that they ju...

...> > between PCI bars and system memory that we see on various > > > platforms. > > > > I don't think you mean bars. That's unrelated to DMA. > > > > > Worse so some of these offsets might be based on > > > banks, e.g. on the broadcom bmips platform. It also deals > > > with bitmask in physical addresses related to memory encryption > > > like AMD SEV. I'd be really curious how for example the > > > Intel virtio based NIC is going to work on any of those > > > plaforms. > > > &gt...

https://bugs.freedesktop.org/show_bug.cgi?id=104621 Bug ID: 104621 Summary: Nouveau prevents booting on Pascal Gpu Product: Mesa Version: 17.3 Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau Assignee: nouveau at

...Distro: Linux Mint 17.3 Rosa Machine: System: innotek product: VirtualBox v: 1.2 Mobo: Oracle model: VirtualBox v: 1.2 Bios: innotek v: VirtualBox date: 12/01/2006 CPU: Quad core Intel Core i7-4790 (-MCP-) cache: 8192 KB flags: (lm nx sse sse2 sse3 sse4_1 sse4_2 ssse3) bmips: 28734 clock speeds: max: 3591 MHz 1: 3591 MHz 2: 3591 MHz 3: 3591 MHz 4: 3591 MHz Graphics: Card: InnoTek Systemberatung VirtualBox Graphics Adapter bus-ID: 00:02.0 Display Server: X.Org 1.17.1 drivers: vboxvideo (unloaded: fbdev,vesa) Resolution: 1920x1080 at 60.0hz...

...| 3 arch/ia64/hp/common/sba_iommu.c | 2 arch/ia64/kernel/dma-mapping.c | 14 arch/ia64/mm/init.c | 3 arch/mips/Kconfig | 1 arch/mips/bmips/dma.c | 4 arch/mips/cavium-octeon/dma-octeon.c | 4 arch/mips/include/asm/dma-direct.h | 4 arch/mips/include/asm/jazzdma.h | 2 arch/mips/jazz/jazzdma.c...

...nd system memory that we see on various > > > > platforms. > > > > > > I don't think you mean bars. That's unrelated to DMA. > > > > > > > Worse so some of these offsets might be based on > > > > banks, e.g. on the broadcom bmips platform. It also deals > > > > with bitmask in physical addresses related to memory encryption > > > > like AMD SEV. I'd be really curious how for example the > > > > Intel virtio based NIC is going to work on any of those > > > > plaforms....

https://bugs.freedesktop.org/show_bug.cgi?id=107210 Bug ID: 107210 Summary: Segment Fault while opening thunderbitf windows Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: critical Priority: medium Component: Driver/nouveau

https://bugs.freedesktop.org/show_bug.cgi?id=98386 Bug ID: 98386 Summary: [NVE7] bus: MMIO write of FAULT at [ IBUS ], Pointer to {TDMS,flat panel) table invalid Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: minor Priority: