search for: blrs

...Work around GlobalISel limitation on Indirect Thunks. 6. https://reviews.llvm.org/D81404: [AArch64] Add clang command line support for -mharden-sls= 7. https://reviews.llvm.org/D81405: [AArch64] Avoid incompatibility between SLSBLR mitigation and BTI codegen, by only using X16 and X17 registers for BLRs. There are a few known places where this toolchain mitigation leaves instructions unmitigated: * Some accesses to thread-local variables use a code sequence with a BLR instruction. This code sequence is part of the binary interface between compiler and linker. If this BLR instruction needs to be...