search for: blocklinear

I'm currently implementing mipmaps but I have a set of troubles guessing the block height and block depth of them. According to https://envytools.readthedocs.io/en/latest/hw/memory/g80-surface.html#textures-mipmapping-and-arrays the texture unit auto resizes mipmaps' blocks but how do I know how many blocks each one uses? I'm currently using this algorithm: u32 height =

Thanks for the last info it was truely helpful. Anyways, I'm currently trying to implement 3D textures into yuzu, as far as I know they are twiddled in a different manner to 2D textures. Could one of you guys point me in the right direction? I've been meddling around: https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/nouveau/nv50/nv50_tex.c but I can't see where the

...t;aritger at nvidia.com> wrote: > Hi Ilia, > > Actually 0x90b8 is different than copy engine. I'm not very familiar > with it, but 0x90b8 is an engine for performing LZO decompression as > part of performing the copy. It has a variety of limitations (e.g., > cannot handle blocklinear format), and was only in a few Fermi chips, > as I understand it. According to our driver source, GF100, GF104, GF110, GF114, and GF116 all have it. [So GF106, GF108, GF117, GF119 don't have it.] We've only had problems reported against GF116... and only for some people. > > It i...

...ia, >> > >> > Actually 0x90b8 is different than copy engine. I'm not very familiar >> > with it, but 0x90b8 is an engine for performing LZO decompression as >> > part of performing the copy. It has a variety of limitations (e.g., >> > cannot handle blocklinear format), and was only in a few Fermi chips, >> > as I understand it. >> >> According to our driver source, GF100, GF104, GF110, GF114, and GF116 >> all have it. [So GF106, GF108, GF117, GF119 don't have it.] We've only >> had problems reported against GF116....

Hello, There's a long-standing bug on nouveau (this is a sample bug, but the issue has been around for a while: https://bugs.freedesktop.org/show_bug.cgi?id=85465) whereby we attempt to use the second PCOPY engine on GF116, and it is sometimes does nothing, despite mmio register 22500 saying that it's not disabled (0x22500 == 0 for this user). In the bug you can see a dump from

Hi Ilia, Actually 0x90b8 is different than copy engine. I'm not very familiar with it, but 0x90b8 is an engine for performing LZO decompression as part of performing the copy. It has a variety of limitations (e.g., cannot handle blocklinear format), and was only in a few Fermi chips, as I understand it. It is probably easiest to just ignore it. You can distinguish this decompress engine from normal copy engine by looking at the CE capability register on falcon (0x00000650). If bit 2 is '1', then the falcon is a decompress e...

...swizzle(struct drm_scanout_buffer *sb, unsigned int x, + unsigned int y, u32 color) +{ + u32 blk_off, off, swizzle; + + blk_off = nv50_get_block_off(x, y, sb->width); + + y = y % nv50_panic_blk_h; + + /* Inside the block, use the fast address swizzle to compute the offset + * For nvidia blocklinear, bit order is yn..y3 x3 y2 x2 y1 y0 x1 x0 + */ + swizzle = (x & 3) | (y & 3) << 2 | (x & 4) << 2 | (y & 4) << 3; + swizzle |= (x & 8) << 3 | (y >> 3) << 7; + off = blk_off + swizzle * 4; + + iosys_map_wr(&sb->map[0], off, u32, color);...

...t x, > + unsigned int y, u32 color) > +{ > + u32 blk_off, off, swizzle; > + > + blk_off = nv50_get_block_off(x, y, sb->width); > + > + y = y % nv50_panic_blk_h; > + > + /* Inside the block, use the fast address swizzle to compute the offset > + * For nvidia blocklinear, bit order is yn..y3 x3 y2 x2 y1 y0 x1 x0 > + */ > + swizzle = (x & 3) | (y & 3) << 2 | (x & 4) << 2 | (y & 4) << 3; > + swizzle |= (x & 8) << 3 | (y >> 3) << 7; > + off = blk_off + swizzle * 4; > + > + iosys_map_wr(&sb-...

...ote: > > Hi Ilia, > > > > Actually 0x90b8 is different than copy engine. I'm not very familiar > > with it, but 0x90b8 is an engine for performing LZO decompression as > > part of performing the copy. It has a variety of limitations (e.g., > > cannot handle blocklinear format), and was only in a few Fermi chips, > > as I understand it. > > According to our driver source, GF100, GF104, GF110, GF114, and GF116 > all have it. [So GF106, GF108, GF117, GF119 don't have it.] We've only > had problems reported against GF116... and only for som...

...t; >> > Actually 0x90b8 is different than copy engine. I'm not very familiar > >> > with it, but 0x90b8 is an engine for performing LZO decompression as > >> > part of performing the copy. It has a variety of limitations (e.g., > >> > cannot handle blocklinear format), and was only in a few Fermi chips, > >> > as I understand it. > >> > >> According to our driver source, GF100, GF104, GF110, GF114, and GF116 > >> all have it. [So GF106, GF108, GF117, GF119 don't have it.] We've only > >> had problem...

...u32 color) >> +{ >> + u32 blk_off, off, swizzle; >> + >> + blk_off = nv50_get_block_off(x, y, sb->width); >> + >> + y = y % nv50_panic_blk_h; >> + >> + /* Inside the block, use the fast address swizzle to compute the offset >> + * For nvidia blocklinear, bit order is yn..y3 x3 y2 x2 y1 y0 x1 x0 >> + */ >> + swizzle = (x & 3) | (y & 3) << 2 | (x & 4) << 2 | (y & 4) << 3; >> + swizzle |= (x & 8) << 3 | (y >> 3) << 7; >> + off = blk_off + swizzle * 4; >> + >>...

This series adds basic drm_panic support for nouveau. Patches 1-2 Add missing bits in drm_panic (ABGR2101010, private data for set_pixel()) Patch 3 registers nouveau to drm_panic, and handle tiling. I've tested on a GTX1650, while running Gnome/Wayland desktop. It should work on other nv50+ cards, but I didn't test them. To test it, you need to build your kernel with CONFIG_DRM_PANIC=y,

This series adds basic drm_panic support for nouveau. Patches 1 Add ABGR2101010 support in drm_panic. Patch 2 registers nouveau to drm_panic, and handle tiling. I've tested on a GTX1650 (Turing) and GF 8800 GT (Tesla), while running Gnome/Wayland desktop, and in VT. It should work on other nv50+ cards, but I didn't test them. To test it, you need to build your kernel with

...t;>> Actually 0x90b8 is different than copy engine. I'm not very familiar >>>>> with it, but 0x90b8 is an engine for performing LZO decompression as >>>>> part of performing the copy. It has a variety of limitations (e.g., >>>>> cannot handle blocklinear format), and was only in a few Fermi chips, >>>>> as I understand it. >>>> >>>> According to our driver source, GF100, GF104, GF110, GF114, and GF116 >>>> all have it. [So GF106, GF108, GF117, GF119 don't have it.] We've only >>>&g...

This series adds basic drm_panic support for nouveau. I've tested on GTX1650 (Turing), GeForce GT 1030 (Pascal) and Geforce 8800 GTS (Tesla), running Gnome/Wayland desktop, and in VT. It should work on other nv50+ cards, but I didn't test them. To test it, you need to build your kernel with CONFIG_DRM_PANIC=y, and run: echo c > /proc/sysrq-trigger or you can enable