Displaying 7 results from an estimated 7 matches for "blk_off".
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2024 Sep 13
1
[PATCH v3 2/2] drm/nouveau: Add drm_panic support for nv50+
.../ nv50_panic_blk_h;
+
+ return ((blk_y * blk_columns) + blk_x) * NV_TILE_GOB_SIZE * nv50_panic_blk_h;
+}
+
+/* Turing and later have 2 level of tiles inside the block */
+static void
+nv50_set_pixel_swizzle(struct drm_scanout_buffer *sb, unsigned int x,
+ unsigned int y, u32 color)
+{
+ u32 blk_off, off, swizzle;
+
+ blk_off = nv50_get_block_off(x, y, sb->width);
+
+ y = y % nv50_panic_blk_h;
+
+ /* Inside the block, use the fast address swizzle to compute the offset
+ * For nvidia blocklinear, bit order is yn..y3 x3 y2 x2 y1 y0 x1 x0
+ */
+ swizzle = (x & 3) | (y & 3) << 2...
2024 Oct 18
2
[PATCH v3 2/2] drm/nouveau: Add drm_panic support for nv50+
...blk_columns) + blk_x) * NV_TILE_GOB_SIZE * nv50_panic_blk_h;
> +}
> +
> +/* Turing and later have 2 level of tiles inside the block */
> +static void
> +nv50_set_pixel_swizzle(struct drm_scanout_buffer *sb, unsigned int x,
> + unsigned int y, u32 color)
> +{
> + u32 blk_off, off, swizzle;
> +
> + blk_off = nv50_get_block_off(x, y, sb->width);
> +
> + y = y % nv50_panic_blk_h;
> +
> + /* Inside the block, use the fast address swizzle to compute the offset
> + * For nvidia blocklinear, bit order is yn..y3 x3 y2 x2 y1 y0 x1 x0
> + */
> + s...
2024 Oct 21
1
[PATCH v3 2/2] drm/nouveau: Add drm_panic support for nv50+
..._GOB_SIZE * nv50_panic_blk_h;
>> +}
>> +
>> +/* Turing and later have 2 level of tiles inside the block */
>> +static void
>> +nv50_set_pixel_swizzle(struct drm_scanout_buffer *sb, unsigned int x,
>> + unsigned int y, u32 color)
>> +{
>> + u32 blk_off, off, swizzle;
>> +
>> + blk_off = nv50_get_block_off(x, y, sb->width);
>> +
>> + y = y % nv50_panic_blk_h;
>> +
>> + /* Inside the block, use the fast address swizzle to compute the offset
>> + * For nvidia blocklinear, bit order is yn..y3 x3 y2 x2 y1...
2024 Sep 13
3
[PATCH v3 0/2] drm/nouveau: Add drm_panic support for nv50+
This series adds basic drm_panic support for nouveau.
Patches 1 Add ABGR2101010 support in drm_panic.
Patch 2 registers nouveau to drm_panic, and handle tiling.
I've tested on a GTX1650 (Turing) and GF 8800 GT (Tesla), while
running Gnome/Wayland desktop, and in VT.
It should work on other nv50+ cards, but I didn't test them.
To test it, you need to build your kernel with
2024 Oct 22
4
[PATCH v4 0/3] drm/nouveau: Add drm_panic support for nv50+
This series adds basic drm_panic support for nouveau.
I've tested on GTX1650 (Turing), GeForce GT 1030 (Pascal) and
Geforce 8800 GTS (Tesla), running Gnome/Wayland desktop, and in VT.
It should work on other nv50+ cards, but I didn't test them.
To test it, you need to build your kernel with CONFIG_DRM_PANIC=y, and run:
echo c > /proc/sysrq-trigger
or you can enable
2024 Sep 06
3
[PATCH v2 0/3] drm/nouveau: Add drm_panic support for nv50+
This series adds basic drm_panic support for nouveau.
Patches 1-2 Add missing bits in drm_panic (ABGR2101010, private data for set_pixel())
Patch 3 registers nouveau to drm_panic, and handle tiling.
I've tested on a GTX1650, while running Gnome/Wayland desktop.
It should work on other nv50+ cards, but I didn't test them.
To test it, you need to build your kernel with CONFIG_DRM_PANIC=y,
2013 Apr 19
8
[PATCH 0 of 8] blktap3/libvhd: Introduce VHD library.
This patch series introduces the VHD library. It is based on the blktap2 one,
with changes coming from the blktap2.5 one.
Signed-off-by: Thanos Makatos <thanos.makatos@citrix.com>