search for: bl_desc

...ev/secboot/gm200.c index 8571a4b4d56c..6f45706f8598 100644 --- a/drm/nouveau/nvkm/subdev/secboot/gm200.c +++ b/drm/nouveau/nvkm/subdev/secboot/gm200.c @@ -174,21 +174,45 @@ struct hsf_fw_header { u32 hdr_size; }; + /** - * struct hsf_load_header - HS firmware load header + * struct gm200_flcn_bl_desc - DMEM bootloader descriptor + * @signature: 16B signature for secure code. 0s if no secure code + * @ctx_dma: DMA context to be used by BL while loading code/data + * @code_dma_base: 256B-aligned Physical FB Address where code is located + * (falcon's $xcbase register) + * @non_sec_code_of...

...u32 pos = 0; + u32 max_desc_size = 0; + u8 *gdesc; + + /* Figure out how large we need gdesc to be. */ + list_for_each_entry(_img, imgs, node) { + const struct acr_r352_ls_func *ls_func = + acr->func->ls_func[_img->falcon_id]; + + max_desc_size = max(max_desc_size, ls_func->bl_desc_size); + } + + gdesc = kmalloc(max_desc_size, GFP_KERNEL); + if (!gdesc) + return -ENOMEM; nvkm_kmap(wpr_blob); @@ -421,7 +435,6 @@ acr_r352_ls_write_wpr(struct acr_r352 *acr, struct list_head *imgs, struct ls_ucode_img_r352 *img = ls_ucode_img_r352(_img); const struct acr_r352_ls_func...

...desc to be. */ > + list_for_each_entry(_img, imgs, node) { > + const struct acr_r352_ls_func *ls_func = > + acr->func->ls_func[_img->falcon_id]; > + > + max_desc_size = max(max_desc_size, ls_func->bl_desc_size); > + } > + > + gdesc = kmalloc(max_desc_size, GFP_KERNEL); > + if (!gdesc) > + return -ENOMEM; > > nvkm_kmap(wpr_blob); > > @@ -421,7 +435,6 @@ acr_r352_ls_write_wpr(struct acr_r352 *acr, struct list_head *imgs, >...

In case memory resources for *bl_desc* were allocated, release them before return. Addresses-Coverity-ID: 1472021 ("Resource leak") Fixes: 0d466901552a ("drm/nouveau/secboot/acr: Remove VLA usage") Signed-off-by: Gustavo A. R. Silva <gustavo at embeddedor.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/secboot/...

Sending things in a smaller chunks since it makes their reviewing easier. This part part 2/3 of the secboot refactoring/PMU command support patch series. Part 1 was the new falcon library which should be merged soon now. This series is mainly a refactoring/sanitization of the existing secure boot code. It does not add new features (part 3 will). Secure boot handling is now separated by NVIDIA

This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the

On 8/2/18 12:51 PM, Gustavo A. R. Silva wrote: > Hi all, > > Friendly ping! Who can take this? > > Thanks > -- > Gustavo > > On 07/24/2018 08:27 AM, Gustavo A. R. Silva wrote: >> In case memory resources for *bl_desc* were allocated, release >> them before return. >> >> Addresses-Coverity-ID: 1472021 ("Resource leak") >> Fixes: 0d466901552a ("drm/nouveau/secboot/acr: Remove VLA usage") >> Signed-off-by: Gustavo A. R. Silva <gustavo at embeddedor.com> >&...

This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the

Hi everyone, Apologies for the big patchset. This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send

...This header is located at the beginning of the HS firmware and HS bootloader + * files, to describe where the headers and data can be found. + */ +struct fw_bin_header { + u32 bin_magic; + u32 bin_ver; + u32 bin_size; + u32 header_offset; + u32 data_offset; + u32 data_size; +}; + +/** + * struct fw_bl_desc - firmware bootloader descriptor + * @start_tag: starting tag of bootloader + * @desc_dmem_load_off: DMEM offset of flcn_bl_dmem_desc + * @code_off: offset of code section + * @code_size: size of code section + * @data_off: offset of data section + * @data_size: size of data section + * + * Th...

This revision includes initial signed PMU firmware support for GM20B (Tegra X1). This PMU code will also be used as a basis for dGPU signed PMU firmware support. With the PMU code, the refactoring of secure boot should also make more sense. ACR (secure boot) support is now separated by the driver version it originates from. This separation allows to run any version of the ACR on any chip,

This is a highly changed revision of the first patch series that adds secure boot support to Nouveau. This code still depends on NVIDIA releasing official firmware files, but the files released with SHIELD TV and Pixel C can already be used on a Jetson TX1. As you know we are working hard to release the official firmware files, however in the meantime it doesn't hurt to review the code so it

New version of the secure boot code that works with the blobs just merged into linux-firmware. Since the required Mesa patches are also merged, this set is the last piece of the puzzle to get out-of-the-box accelerated Maxwell 2. The basic code remains the same, with a few improvements with respect to how secure falcons are started. Hopefully the patchset is better split too. I have a

Hi all, Friendly ping! Who can take this? Thanks -- Gustavo On 07/24/2018 08:27 AM, Gustavo A. R. Silva wrote: > In case memory resources for *bl_desc* were allocated, release > them before return. > > Addresses-Coverity-ID: 1472021 ("Resource leak") > Fixes: 0d466901552a ("drm/nouveau/secboot/acr: Remove VLA usage") > Signed-off-by: Gustavo A. R. Silva <gustavo at embeddedor.com> > --- > drivers/g...

...m> wrote: > On 8/2/18 12:51 PM, Gustavo A. R. Silva wrote: >> Hi all, >> >> Friendly ping! Who can take this? >> >> Thanks >> -- >> Gustavo >> >> On 07/24/2018 08:27 AM, Gustavo A. R. Silva wrote: >>> In case memory resources for *bl_desc* were allocated, release >>> them before return. >>> >>> Addresses-Coverity-ID: 1472021 ("Resource leak") >>> Fixes: 0d466901552a ("drm/nouveau/secboot/acr: Remove VLA usage") >>> Signed-off-by: Gustavo A. R. Silva <gustavo at embe...

This was the first step of the secure boot refactoring - as Ben asked for some fixes, I now submit it as its own series to make it easier to review (and also because rebasing secure boot on top of this takes time and I don't want to do it until this is validated!). This series attempts to factorize the duplicate falcon-related code into a single library, using the existing nvkm_falcon

This was the first step of the secure boot refactoring - as Ben asked for some fixes, I now submit it as its own series to make it easier to review (and also because rebasing secure boot on top of this takes time and I don't want to do it until this is validated!). This series attempts to factorize the duplicate falcon-related code into a single library, using the existing nvkm_falcon