search for: bjorn

...this could easily solve some of our problems. However, I cannot get this to work with Asterisk using Eyebeam. Is this because the function is simply not supported within Asterisk? If lack of support is the case, anyone knows if this feature is to be implemented in the near future? Regards, Bjorn -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.digium.com/pipermail/asterisk-users/attachments/20050617/6bc325dc/attachment.htm

...k_v2 > > This all looks really reasonable and like a good cleanup, but it's a bit > too much detail so I'll punt review to someone else with more clue. Patches [3/7] to [7/7] were reviewed by Peter Wu, the HDA bits in patch [5/7] additionally by Takashi. Patch [2/7] was acked by Bjorn. There was no ack for patch [1/7] (authored by Rafael), but it adressed the objection Bjorn raised against my original patch, so I'm assuming Bjorn is okay with it. (Bjorn, please let me know if that isn't the case.) The series has been tested on 5 systems, which raises the confidence: 2x...

On Wed, Oct 31, 2012 at 09:13:43PM +0100, Bjorn De Sutter wrote: > Hi all, > > I am working on a CGRA backend (something like a 2D VLIW), and we also absolutely need predication. I extended the IfConversion pass to allow it to be executed multiple times and to predicate already predicated code. This is necessary to predicate code with...

...and initiation interval constraints (such as ResMII, RecMII). In my view, the ideal would be to have very generic, full (OpenIMPACT-like) predication support throughout LLVM, with the option of enabling/skipping early if-conversion just like one can enable or disable aggressive inlining. Best, Bjorn De Sutter Computer Systems Lab Ghent University

...umber of available registers of any type in a machine description is decreased to 256 because it needs to be encoded in uint8_t now. I'm trying to support an experimental embedded architecture with more registers (out of tree), but now that becomes impossible. Anyone knows a solution? Thanks, Bjorn De Sutter Computer Systems Lab Ghent University

...11392 820 0 12212 2fb4 drivers/virtio/virtio_ring.o After mst at tuck linux]$ size drivers/virtio/virtio_ring.o text data bss dec hex filename 11284 820 0 12104 2f48 drivers/virtio/virtio_ring.o Cc: Ohad Ben-Cohen <ohad at wizery.com> Cc: Bjorn Andersson <bjorn.andersson at linaro.org> Cc: linux-remoteproc at vger.kernel.org Signed-off-by: Michael S. Tsirkin <mst at redhat.com> --- It's good in theory, but could one of RPMSG maintainers please review and ack this patch? Or even better test it? All these barriers are usel...

...11392 820 0 12212 2fb4 drivers/virtio/virtio_ring.o After mst at tuck linux]$ size drivers/virtio/virtio_ring.o text data bss dec hex filename 11284 820 0 12104 2f48 drivers/virtio/virtio_ring.o Cc: Ohad Ben-Cohen <ohad at wizery.com> Cc: Bjorn Andersson <bjorn.andersson at linaro.org> Cc: linux-remoteproc at vger.kernel.org Signed-off-by: Michael S. Tsirkin <mst at redhat.com> --- It's good in theory, but could one of RPMSG maintainers please review and ack this patch? Or even better test it? All these barriers are usel...

From: Bjorn Helgaas <bhelgaas at google.com> The "virtio_mmio.device=" command line argument allows a user to specify the size, address, and IRQ of a virtio device. Previously the only requirement for the IRQ was that it be an unsigned integer. Zero is an unsigned integer but an invalid IRQ...

From: Bjorn Helgaas <bhelgaas at google.com> The "virtio_mmio.device=" command line argument allows a user to specify the size, address, and IRQ of a virtio device. Previously the only requirement for the IRQ was that it be an unsigned integer. Zero is an unsigned integer but an invalid IRQ...

I changed it to uint16_t in r152100. Is that enough for your architecture? On Tue, Mar 6, 2012 at 12:24 AM, Bjorn De Sutter < bjorn.desutter at elis.ugent.be> wrote: > Hi all, > > in r152019 (from ctopper), the number of available registers of any type > in a machine description is decreased to 256 because it needs to be encoded > in uint8_t now. I'm trying to support an experimental...

Hi, that solved my problem on trunk as well, thanks. Strange that you have to include this though. Bjorn On 27 Nov 2012, at 00:00, Daniel Prokesch <daniel.prokesch at gmail.com> wrote: > Hi, > > I accidentally stumbled upon your post. > I observed similar behaviour whenever I did not include > > #include "llvm/Support/Debug.h" > #include "llvm/Support/raw_...

...ar, what is the exact nature of > your question? > > Sergei Larin > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. > > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On > Behalf Of Bjorn De Sutter > Sent: Friday, November 11, 2011 7:59 AM > To: llvmdev at cs.uiuc.edu > Subject: [LLVMdev] alias analysis in ScheduleDagInstr class > > In ScheduleDagInstr.cpp, a todo is mentioned to make this pass use real > alias analysis information. Is anybody working on this alre...

...er) presented at the same time. What is your timeline? How much time you can afford until you must have this? Also, are you attending the LLVM meeting in San Jose this week? Sergei Larin -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum. -----Original Message----- From: Bjorn De Sutter [mailto:bjorn.desutter at elis.ugent.be] Sent: Monday, November 14, 2011 10:18 AM To: Sergei Larin Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] alias analysis in ScheduleDagInstr class Hi Sergei, thanks for considering my question. We if-convert some code, such that the basic block...

...::PrintRegUnit&) /work/llvm/trunk/llvm/include/llvm/Target/TargetRegisterInfo.h:908:28: note: no known conversion for argument 2 from 'bool' to 'const llvm::PrintRegUnit&' Including the raw_ostream.h fixes this, but that is not a thing I should have to do, right? Best, Bjorn On 27 Nov 2012, at 09:05, Craig Topper <craig.topper at gmail.com> wrote: > Can you try making the constructor "explicit" for PrintReg in include/llvm/Target/TargetRegisterInfo.h. I think you were getting an implicit conversion there which should probably be fixed anyway. &g...

Can you try making the constructor "explicit" for PrintReg in include/llvm/Target/TargetRegisterInfo.h. I think you were getting an implicit conversion there which should probably be fixed anyway. On Mon, Nov 26, 2012 at 11:47 PM, Bjorn De Sutter < bjorn.desutter at elis.ugent.be> wrote: > Hi, > > that solved my problem on trunk as well, thanks. Strange that you have to > include this though. > > Bjorn > > On 27 Nov 2012, at 00:00, Daniel Prokesch <daniel.prokesch at gmail.com> > wrote: >...

...r: Error in dyn.load(x, as.logical(local), as.logical(now)): Unable to load shared library '/usr/lib/R/library/foreign/libs/foreign.so': /usr/lib/R/library/foreign/libs/foreign.so: undefined symbol: isfinite Error: package/namespace load failed for 'foreign' What is going wrong? Bjorn Bjorn Van Campenhout Institute of Development Policy and Management (IDPM) University of Antwerp Venusstraat 35 2000 Antwerp - Belgium ++32 3 220 4648 www.ua.ac.be/bjorn.vancampenhout

[+cc Hans, author of 0b2fe6594fa2 ("drm/nouveau: Queue hpd_work on (runtime) resume")] On Fri, Mar 22, 2019 at 06:30:15AM -0500, Bjorn Helgaas wrote: > On Thu, Mar 21, 2019 at 05:48:19PM -0500, Bjorn Helgaas wrote: > > On Wed, Mar 13, 2019 at 06:25:02PM -0400, Lyude Paul wrote: > > > On Fri, 2019-02-15 at 16:17 -0500, Lyude Paul wrote: > > > > On Thu, 2019-02-14 at 18:43 -0600, Bjorn Helgaas wrote: &g...

...the same). The superfluous copy operations are then later removed. But does that mean that during instruction selection, I have to start looking for patterns like select (cmp gt src1 src2) (copy src1) (copy src2) to find opportunities for max/min operations? Or should that not be needed? Thanks. Bjorn > > On Mon, Jan 21, 2013 at 5:32 AM, Bjorn De Sutter <bjorn.desutter at elis.ugent.be> wrote: > Hi all, > > when compiling code like > > short ptr * = some_address; > int val; > > val = *ptr; > if (val>2047) > val = 2047; > else if (val<-2...

On Jan 21, 2013, at 6:34 AM, Justin Holewinski <justin.holewinski at gmail.com> wrote: > > On Mon, Jan 21, 2013 at 9:16 AM, Bjorn De Sutter <bjorn.desutter at elis.ugent.be> wrote: > On 21 Jan 2013, at 14:39, Justin Holewinski <justin.holewinski at gmail.com> wrote: > >> Instruction selection happens on a different IR: SelectionDAG. In this IR, there are sign-extending loads that the IR converter wil...

On Mon, Jan 21, 2013 at 9:16 AM, Bjorn De Sutter < bjorn.desutter at elis.ugent.be> wrote: > On 21 Jan 2013, at 14:39, Justin Holewinski <justin.holewinski at gmail.com> > wrote: > > Instruction selection happens on a different IR: SelectionDAG. In this > IR, there are sign-extending loads that the IR conver...