Displaying 8 results from an estimated 8 matches for "bitnumber".
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2011 Jul 26
2
[LLVMdev] XOR Optimization
Hi Daniel,
> Hi folks,
>
> I couldn't find a specific XOR (OR and AND) optimization on llvm, and
> therefore I am about to implement it.
> But first I would like to check with you guys that it really does not exist.
>
> For a simple loop like this:
>
> nbits = 128;
> bit_addr = 0;
> while(nbits--)
> {
> bindex=bit_addr>>5; /* Index is
2011 Jul 26
2
[LLVMdev] XOR optimization
Hi folks,
I couldn't find a specific XOR (OR and AND) optimization on llvm, and
therefore I am about to implement it.
But first I would like to check with you guys that it really does not exist.
For a simple loop like this:
nbits = 128;
bit_addr = 0;
while(nbits--)
{
bindex=bit_addr>>5; /* Index is number /32 */
bitnumb=bit_addr % 32; /* Bit number in longword */
2007 Sep 04
0
[LLVMdev] [PATCH]: Add SparseBitmap implementation
...just removed from the API.
> + bool AtEnd;
> +
> + SparseBitmap<ElementSize> &Bitmap;
> +
> + // Current element inside of bitmap
> + ElementListConstIter Iter;
> +
> + // Current bit number inside of our bitmap
> + unsigned BitNumber;
> +
> + // Current word number inside of our element
> + unsigned WordNumber;
> +
> + // Current bits from the element.
> + typename SparseBitmapElement<ElementSize>::BitWord Bits;
Can these SparseBitmapIterator members, and a few more that...
2011 Jul 26
0
[LLVMdev] XOR Optimization
Hi,
On Tue, Jul 26, 2011 at 11:32 AM, Matt Johnson
<johnso87 at crhc.illinois.edu>wrote:
> Hi Daniel,
>
> > Hi folks,
> >
> > I couldn't find a specific XOR (OR and AND) optimization on llvm, and
> > therefore I am about to implement it.
> > But first I would like to check with you guys that it really does not
> exist.
> >
> > For a
2007 Sep 01
2
[LLVMdev] [PATCH]: Add SparseBitmap implementation
The attached patch adds a SparseBitmap implementation, which more or
less works the same way as GCC's sparse bitmap.
That is, we only store non-zero bits (broken up into elements of some
bit size), and store the elements in a linked list.
We keep track of the last accessed part of the linked list, so
in-order tests/sets/resets are all constant time, rather than linear
time.
Set operations
2007 Sep 04
2
[LLVMdev] [PATCH]: Add SparseBitmap implementation
...+ bool AtEnd;
> > +
> > + SparseBitmap<ElementSize> &Bitmap;
> > +
> > + // Current element inside of bitmap
> > + ElementListConstIter Iter;
> > +
> > + // Current bit number inside of our bitmap
> > + unsigned BitNumber;
> > +
> > + // Current word number inside of our element
> > + unsigned WordNumber;
> > +
> > + // Current bits from the element.
> > + typename SparseBitmapElement<ElementSize>::BitWord Bits;
>
> Can these SparseBitmapIterator me...
2013 Feb 22
48
[PATCH v3 00/46] initial arm v8 (64-bit) support
This round implements all of the review comments from V2 and all patches
are now acked. Unless there are any objections I intend to apply later
this morning.
Ian.
2013 Jan 23
132
[PATCH 00/45] initial arm v8 (64-bit) support
First off, Apologies for the massive patch series...
This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8
(AArch64) model. The kernel is the same one as I am currently using with
the 32 bit hypervisor
I haven''t yet tried starting a guest or anything super advanced like
that ;-). Also there is not real support for 64-bit domains at all,
although in one or two places I