search for: biing

Displaying 20 results from an estimated 1305 matches for "biing".

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2007 Apr 25
2
[LLVMdev] Work in progress patch to speed up andersen's implementation
Hi guys, i'm not going to have time to work on this for a month or two, so i figured i'd post it. This patch 1. reworks the andersen's implementation to support field sensitivity (though field-sensitive constraints are not generated directly yet), and uses it to do indirect function call support. 2. Rewrites the solver to be state of the art in terms of speed. kimwitu++ used to take
2017 Jun 27
3
Windows iconv() "failure" in certain locales
This is a continuation of the R-devel thread with subject "suggestion to fix packageDescription() for Windows users" : As I said there, a patch should rather address the underlying problem in packageDescription rather than a kludgy workaround patch for citation(). (For that same reason, Ben Marwick proposed to fix packageDescription() rather than the symptom seen in citation().)
2018 Apr 11
2
[RFC PATCH net-next v6 2/4] net: Introduce generic bypass module
Tue, Apr 10, 2018 at 08:59:48PM CEST, sridhar.samudrala at intel.com wrote: >This provides a generic interface for paravirtual drivers to listen >for netdev register/unregister/link change events from pci ethernet >devices with the same MAC and takeover their datapath. The notifier and >event handling code is based on the existing netvsc implementation. > >It exposes 2 sets of
2018 Apr 11
2
[RFC PATCH net-next v6 2/4] net: Introduce generic bypass module
Tue, Apr 10, 2018 at 08:59:48PM CEST, sridhar.samudrala at intel.com wrote: >This provides a generic interface for paravirtual drivers to listen >for netdev register/unregister/link change events from pci ethernet >devices with the same MAC and takeover their datapath. The notifier and >event handling code is based on the existing netvsc implementation. > >It exposes 2 sets of
2018 Apr 10
0
[RFC PATCH net-next v6 2/4] net: Introduce generic bypass module
This provides a generic interface for paravirtual drivers to listen for netdev register/unregister/link change events from pci ethernet devices with the same MAC and takeover their datapath. The notifier and event handling code is based on the existing netvsc implementation. It exposes 2 sets of interfaces to the paravirtual drivers. 1. existing netvsc driver that uses 2 netdev model. In this
2005 Aug 29
0
Core dump during lazy loading of "survival" at installation time (PR#8106)
Full_Name: D Kreil Version: 2.1.1 OS: HP-UX B.11.23 U ia64 0029870451 unlimited-user license Submission from: (NULL) (62.178.15.60) I sadly get a core-dump during installation, when it tries to lazyload package survival. Any idea what to do about this? Best regards, D. ... include -fPIC -g -O2 -c survindex2.c -o survindex2.o gcc -I/bi/common/src/R-2.1.1/include
2017 Jun 28
0
Windows iconv() "failure" in certain locales
On 27.06.2017 17:36, Martin Maechler wrote: > This is a continuation of the R-devel thread with subject > "suggestion to fix packageDescription() for Windows users" : > > As I said there, a patch should rather address the underlying > problem in packageDescription rather than a kludgy workaround > patch for citation(). > (For that same reason, Ben Marwick
2018 Apr 11
0
[RFC PATCH net-next v6 2/4] net: Introduce generic bypass module
On 4/11/2018 8:51 AM, Jiri Pirko wrote: > Tue, Apr 10, 2018 at 08:59:48PM CEST, sridhar.samudrala at intel.com wrote: >> This provides a generic interface for paravirtual drivers to listen >> for netdev register/unregister/link change events from pci ethernet >> devices with the same MAC and takeover their datapath. The notifier and >> event handling code is based on the
2012 Jul 03
2
EM algorithm to find MLE of coeff in mixed effects model
I have a general question about coefficients estimation of the mixed model. I simulated a very basic model: Y|b=X*\beta+Z*b +\sigma^2* diag(ni); b follows N(0,\psi) #i.e. bivariate normal where b is the latent variable, Z and X are ni*2 design matrices, sigma is the error variance, Y are longitudinal data, i.e. there are ni
2012 Jun 29
0
Adding Bi-gram in the QueryParser and Object.
Hi all, I have jotted down a plan for how to handle or add Bi-gram in Query Object though QueryParser. PFA as a sequence diagram which depicts what i got to know about how parser works and query is build from tokens provided by the lexer.I have highlighted some area in blue where i think there is possibility of having bi-grams.While Integrating bi-gram in the Parser ,Query our aim is to generate
2018 Apr 10
6
[RFC PATCH net-next v6 0/4] Enable virtio_net to act as a backup for a passthru device
The main motivation for this patch is to enable cloud service providers to provide an accelerated datapath to virtio-net enabled VMs in a transparent manner with no/minimal guest userspace changes. This also enables hypervisor controlled live migration to be supported with VMs that have direct attached SR-IOV VF devices. Patch 1 introduces a new feature bit VIRTIO_NET_F_BACKUP that can be used
2012 Aug 22
1
[LLVMdev] Insert Self Written Function Call from a FunctionPass?
Hello all; So my goal is to insert some (self-written) function calls in the LLVM IR. I can achieve it with a ModulePass and using the getOrInsertFunction() call. For a ModulePass I follow the steps- 1. Compile the code (in which call instructions are to be inserted) to LLVM IR 2. Compile the file (which contains the *called* external function ) to LLVM IR 3. Link them together and run the
2018 Apr 18
2
[RFC PATCH net-next v6 2/4] net: Introduce generic bypass module
Wed, Apr 11, 2018 at 09:13:52PM CEST, sridhar.samudrala at intel.com wrote: >On 4/11/2018 8:51 AM, Jiri Pirko wrote: >> Tue, Apr 10, 2018 at 08:59:48PM CEST, sridhar.samudrala at intel.com wrote: >> > This provides a generic interface for paravirtual drivers to listen >> > for netdev register/unregister/link change events from pci ethernet >> > devices with the
2018 Apr 18
2
[RFC PATCH net-next v6 2/4] net: Introduce generic bypass module
Wed, Apr 11, 2018 at 09:13:52PM CEST, sridhar.samudrala at intel.com wrote: >On 4/11/2018 8:51 AM, Jiri Pirko wrote: >> Tue, Apr 10, 2018 at 08:59:48PM CEST, sridhar.samudrala at intel.com wrote: >> > This provides a generic interface for paravirtual drivers to listen >> > for netdev register/unregister/link change events from pci ethernet >> > devices with the
2012 Jun 27
4
[V4]fix ocfs2 aio/dio writing process hang
V4 changes: add Acked-by: Joel Becker <jlbec at evilplan.org> V3 changes: - add Cc: stable at vger.kernel.org in the patch header to align with stable rules - add Acked-by: Jeff Moyer <jmoyer at redhat.com> V2 changes: - update the patch header of the first patch to make it more clear. This patch list fixes an issue about ocfs2 aio/dio write process hang. The call trace is like
2012 Jul 03
0
need help EM algorithm to find MLE of coeff in mixed effects model
Dear All, have a general question about coefficients estimation of the mixed model. I simulated a very basic model: Y|b=X*\beta+Z*b +\sigma^2* diag(ni); b follows N(0,\psi) #i.e. bivariate normal where b is the latent variable, Z and X are ni*2 design matrices, sigma is the error variance, Y are longitudinal data, i.e. there are ni
2006 Jul 01
5
generate bi-variate normal data
Dear all, I would like to generate bi-variate normal data given that the first column of the data is known. for example: I first generate a set of data using the command, x <- rmvnorm(10, c(0, 0), matrix(c(1, 0, 0, 1), 2)) then I would like to sum up the two columns of x: x.sum <- apply(x, 1, sum) now with x.sum I would like to generate another column of data, say y, that makes
2007 Jan 09
3
[LLVMdev] Pattern matching questions
I was able to resolve my previous question about dealing with custom loads/stores, and following Chris' suggestion, the IBM Cell SPU backend can generate code for "int main(void) { return 0; }" without crashing llc. There's a lot of work still to be done... like getting frame offsets correctly computed and hauling in the raft of intrinsics that the Cell SDK defines. Three quick
2007 Jan 09
2
[LLVMdev] Pattern matching questions
On Tue, 9 Jan 2007, Evan Cheng wrote: >> - How does one deal with multiple instruction sequences in a pattern? >> To load a constant is a two instruction sequence, but both >> instructions only take two operands (assume that r3 is a 32-bit >> register): >> >> ilhu $3, 45 # r3 = (45 << 16) >> iohl $3, 5 # r3 |= 5
2007 Jan 09
0
[LLVMdev] Pattern matching questions
On Jan 9, 2007, at 10:01 AM, Scott Michel wrote: > I was able to resolve my previous question about dealing with custom > loads/stores, and following Chris' suggestion, the IBM Cell SPU > backend > can generate code for "int main(void) { return 0; }" without crashing > llc. There's a lot of work still to be done... like getting frame > offsets correctly