search for: big_step_size

...although not quite for this > case). > > Hi Hal, MachineLICM is not able to hoist anything because the address mode is not loop invariant. Here is a reduction of the code I am talking about. extern const unsigned phasor[4096]; void test(unsigned* out , unsigned step_size) { unsigned big_step_size = step_size<<2; int *phasor_ptr_temp_1 = &phasor[big_step_size]; for (int i = 0 ; i < 1020 ; i+=4) out[i] = phasor_ptr_temp_1[i<<step_size]; } I am getting slightly better code on my target (Octasic's Opus) if I return false for shouldMergeGEPs. I just tried with ppc64...

...s mode > > is > > not loop invariant. > > > > > > Here is a reduction of the code I am talking about. > > > > > > > > extern const unsigned phasor[4096]; > > void test(unsigned* out , unsigned step_size) > > { > > unsigned big_step_size = step_size<<2; > > int *phasor_ptr_temp_1 = &phasor[big_step_size]; > > for (int i = 0 ; i < 1020 ; i+=4) > > out[i] = phasor_ptr_temp_1[i<<step_size]; > > } > > > > > > I am getting slightly better code on my target (Octasic's Opu...

Hello I am not sure I understand the logic for merging GEPs in InstructionCombining.cpp: static bool shouldMergeGEPs(GEPOperator &GEP, GEPOperator &Src) { // If this GEP has only 0 indices, it is the same pointer as // Src. If Src is not a trivial GEP too, don't combine // the indices. if (GEP.hasAllZeroIndices() && !Src.hasAllZeroIndices() &&