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...to the reaching defs, and paired > with the predecessor block to which the def corresponds. At this point, > the graph looks a lot like the standard SSA graph. > > > There are cases where there are multiple reaching defs emerging in a > straight-line code. Imagine a register BIG_REG that has two > non-overlapping subregisters, SMALL_REG_1 and SMALL_REG_2. Now, consider > this: > > SMALL_REG_1 = ... > SMALL_REG_2 = ... > ... = BIG_REG > > Both of the preceding definitions of of the subregisters of BIG_REG > reach the use of BIG_REG, and both of t...

Hi Venu, > On Sep 11, 2017, at 11:00 PM, Raghavan, Venugopal via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi Krzysztof, > > Thanks for your reply. > > I agree that adding extra register units for x86 would be the right way to fix this. Do you know if there is a plan to fix this? No concrete plan, no. We've been thinking about for quite some time now, but

...to the reaching defs, and > paired with the predecessor block to which the def corresponds. At > this point, the graph looks a lot like the standard SSA graph. > > > There are cases where there are multiple reaching defs emerging in a > straight-line code. Imagine a register BIG_REG that has two > non-overlapping subregisters, SMALL_REG_1 and SMALL_REG_2. Now, > consider > this: > > SMALL_REG_1 = ... > SMALL_REG_2 = ... > ... = BIG_REG > > Both of the preceding definitions of of the subregisters of BIG_REG > reach the use of BIG_REG, and both...

...t; paired with the predecessor block to which the def corresponds. At > this point, the graph looks a lot like the standard SSA graph. > > > There are cases where there are multiple reaching defs emerging in a > straight-line code. Imagine a register BIG_REG that has two > non-overlapping subregisters, SMALL_REG_1 and SMALL_REG_2. Now, > consider > this: > > SMALL_REG_1 = ... > SMALL_REG_2 = ... > ... = BIG_REG > > Both of the preceding definitions of of the subregiste...

...rresponds. >>> At >>> this point, the graph looks a lot like the standard SSA graph. >>> >>> >>> There are cases where there are multiple reaching defs emerging >>> in a >>> straight-line code. Imagine a register BIG_REG that has two >>> non-overlapping subregisters, SMALL_REG_1 and SMALL_REG_2. Now, >>> consider >>> this: >>> >>> SMALL_REG_1 = ... >>> SMALL_REG_2 = ... >>> ... = BIG_REG >>> >&...