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...s register. While it appears that I would be able to accomplish this by rummaging through the instruction operands, a combination of the flag(s) MayLoad/MayStore and MoveImm seemed attractive/clean/efficient(?), if the instruction description did indeed use the flags. Hence the question. Thanks, Bharadwaj On Fri, Feb 9, 2018 at 12:17 PM, Craig Topper <craig.topper at gmail.com> wrote: > That flag is specifically used by the foldImmediate optimization in the > Peephole pass. We don't implement the TLI foldImmediate hook the peephole > pass uses on x86 so we have no reason to set...

Thanks for your reply, Paul. That seems to be a plausible explanation. I ended up adding code in my project to massage the output of llvm-config to the right paths based of the values of CMAKE_GENERATOR and build-mode. Bharadwaj On Dec 15, 2017 9:46 AM, "Robinson, Paul" <paul.robinson at sony.com> wrote: It may be that llvm-config simply doesn't understand a multi-configuration build tree. Ninja and make use single-configuration trees, XCode and Visual Studio use multi-configuration. --paulr *Fr...

...$0, (%ecx)" either since those aren't moves. For X86 you can try using "X86II::hasImm(MI.getDesc().TSFlags)" that's what the encoder uses to determine if there's an immediate to encode at the end of the instruction encoding. ~Craig On Fri, Feb 9, 2018 at 1:13 PM, S. Bharadwaj Yadavalli <bharadwajy at gmail.com > wrote: > I am trying to categorize the machine instructions based on associated > static (i.e., as encoded in .td file) machine description and the > corresponding APIs. > I would like to perform appropriate actions based on the kind of > i...

...erated X86GenInstrInfo.inc). I do not see that to be the case. Can someone please tell me if my expectation is flawed? Is there a better/different way to determine to test for move immediate to register/memory instruction on X86 other that the existing interface MCID::isMoveImmediate()? Thanks, Bharadwaj -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180209/199e6a54/attachment.html>

...rmed compile unit descriptor anchor type"' failed. This makes it hard for me to easily create a test case and submit a bug report. Hence, I thought I should take this opportunity to delve deeper into LLVM and look at this issue. Any further nudges / help is highly appreciated! Thanks, Bharadwaj On Wed, Mar 4, 2009 at 3:59 PM, Duncan Sands <baldrick at free.fr> wrote: > Hi Bharadwaj, > > > I get the following error during compilation using the LLVM > cross-compiler > > (x86_64->arm). > > > > error: nested functions are disabled, use -fnested-func...

On Mar 4, 2009, at 1:33 PM, S. Bharadwaj Yadavalli wrote: > Hi Duncan, > > Thanks for your reply. > > I did try the method suggested by you. I got a foo.bc with -emit- > llvm switch. llc on foo.bc gets me the same assertion failure, as > you pointed out. > > Then I ran bugpoint to generate bugpoint-reduced-s...

That flag is specifically used by the foldImmediate optimization in the Peephole pass. We don't implement the TLI foldImmediate hook the peephole pass uses on x86 so we have no reason to set the flag on any instructions What are you trying to do? ~Craig On Fri, Feb 9, 2018 at 11:45 AM, S. Bharadwaj Yadavalli via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi, > > I had (naively?) expected that the instruction to move immediate to > register or memory (such as MOV32mi, MOV32ri, MOV64mi32, MOV64ri, > MOV64ri32) would be marked with the flag MCID::MovImm via the > X8...

Luke Dalessandro wrote: > S. Bharadwaj Yadavalli wrote: >> $ ../../../src/llvm-gcc-4.2/configure >> --prefix=<llvm-root>/install/x86_64-arm/llvm-gcc-4.2 >> --program-prefix=llvm-x86_64-arm >> --enable-llvm=<llvm-root>/install/x86_64-arm/llvm >> --enable-languages=c,c++ --disable-multilib &g...

Hi , Currently GobalIsel like FastIsel designed to use fallback to DAGIsel in case of failure. You can use -global-isel-abort=2 option. llc -global-isel -pass-remarks-missed="gisel-*" -global-isel-abort=2 simple_foo.ll Regards, Igor From: S. Bharadwaj Yadavalli [mailto:bharadwajy at gmail.com] Sent: Thursday, November 09, 2017 03:36 To: Aditya Nandakumar <proaditya at gmail.com> Cc: Craig Topper <craig.topper at gmail.com>; llvm-dev <llvm-dev at lists.llvm.org>; Breger, Igor <igor.breger at intel.com> Subject: Re: [llvm-d...

...t recognizing that the tool is indeed being run from dev tree. Would anyone know what I am missing? I do not see this behavior on Linux - probably since build binaries are placed in <llvm-build-dir>/bin on Linux as opposed to <llvm-build-dir>/<build-type>/bin on MacOS. Thanks, Bharadwaj -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20171214/ec9771bc/attachment.html>

...on of --with-tags option to configure script. However, I get the following errors respectively when I specify --with-tags or --with-tags=TAGS option to configure. configure: error: Unsupported tag name: yes and configure: error: Unsupported tag name: TAGS What am I missing? Thanks for any help. Bharadwaj -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090407/f0a1efdf/attachment.html>

Hi, Is there some place I can get instructions to load, build and debug LLVM and/or Clang using XCode on Mac OSX? Sorry if this is an FAQ - my (possibly quick) search did not yield an answer. Thanks, Bharadwaj

...1).getImm()); } } returns an invalid condition for JCC_2 and JCC_4 conditional opcodes. What is the suggested way to figure out the condition code for JCC_2 and JCC_4? Should I just roll one up for myself to handle such opcodes based on the above? Am I missing something conceptually? Thanks, Bharadwaj

Hi, Sorry for the newbie question. I downloaded llvm and tried out the simple "Hello, World" program but got the following error. What am I missing? I am running RHAS 3 Update 4 with GCC 3.2.3. Thanks, Bharadwaj $ ./hello lli: /home/proj/skokomish/syadaval/ia32/Sandbox/llvm/lib/Target/X86/X86CodeEmitter.cpp:208: unsigned char ModRMByte(unsigned int, unsigned int, unsigned int): Assertion `Mod < 4 && RegOpcode < 8 && RM < 8 && "ModRM Fields out of range!"' fai...

I believe if you pass(iirc) -pass-remarks-missed=“gisel-*”, it’ll print the instruction it failed to legalize. Sent from my iPhone > On Oct 11, 2017, at 6:44 PM, S. Bharadwaj Yadavalli via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Thanks for your quick reply. > > Here its is: > > =========== > > ; ModuleID = 'simple_foo.c' > source_filename = "simple_foo.c" > target datalayout = "e-m:o-i64:64-f80:128-...

...e resulting in this error. It turns out that this is a 2 line shell script that exec's the arguments like thus: #!/bin/sh exec "$@" Where is the assembler that needs to be invoked? What do I need to do to get the configuration find it? What am I doing wrong? Thanks for any help! Bharadwaj -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090130/e5e26c3b/attachment.html>

S. Bharadwaj Yadavalli wrote: > > I am trying to build a x86_64 to ARM cross compiler. > > I configured, built and installed LLVM as follows: > > $ ../../../src/llvm/configure > --with-llvmgccdir=<llvm-root>/install/x86_64-arm/llvm-gcc-4.2 > --enable-optimized --enable-jit &g...

...ddc55d2cf3c6892fe18eecb0c89d9)"} On Wed, Oct 11, 2017 at 5:50 PM, Craig Topper <craig.topper at gmail.com> wrote: > global-isel for x86 is still very much a work in progress. What was the > content for simple_foo.ll? > > ~Craig > > On Wed, Oct 11, 2017 at 5:39 PM, S. Bharadwaj Yadavalli via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Hi, >> >> Can someone please let me know if I can expect GlobalISel to be >> functional for x86/x86-64 targets? >> >> $ uname -a >> >> Darwin <Machine-Name> 17.0.0 Da...

...D -> master, origin/master, origin/HEAD) [Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). clang 9563977e8b (HEAD -> master, origin/master, origin/HEAD) [X86] Add support for 'amdfam17h' to __builtin_cpu_is to match gcc. Thanks, Bharadwaj -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20171011/31ef61e7/attachment.html>

...he error : llc: <temp-filename>.bc: Unknown instruction for all the tests. Are these failures known/expected? If not, am I doing something wrong? A quick check appears to indicate that the failure is in llvm/lib/Bitcode/Reader/BitcodeReader.cpp:BitcodeReader::ParseFunctionBody(). Thanks, Bharadwaj