search for: bhandarkar

Displaying 20 results from an estimated 47 matches for "bhandarkar".

2014 May 01
2
[LLVMdev] What is HexagonTargetMachine::addPassesForOptimizations for?
On 4/30/2014 5:24 PM, Craig Topper wrote: > Pranav, can you remove it? > Yes, I'll remove it. Pranav -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
2012 Jul 06
2
[LLVMdev] MachineOperand: Subreg defines and the Undef flag
On Jul 5, 2012, at 6:01 PM, "Pranav Bhandarkar" <pranavb at codeaurora.org> wrote: > Hi Jakob, > >> New_MI_1:: Vreg1 = 0 ; Vreg1 and Vreg2 >> are 32 bit virt. regs. >> New_MI_2:: Vreg2 = COPY C:lo_sub_reg. >> New_MI_3:: B= REG_SEQUENCE<Vreg1, hi_sub_reg, Vreg2, lo_...
2012 Apr 27
0
[LLVMdev] MemRefs in a Load Instruction
> -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Pranav Bhandarkar > Sent: Thursday, April 26, 2012 5:24 PM > To: llvmdev at cs.uiuc.edu > Subject: [LLVMdev] MemRefs in a Load Instruction > > Hi, > > On the hexagon target, I have written a following combiner pattern. > ********************************************* > > def: Pat<(...
2012 Apr 26
2
[LLVMdev] MemRefs in a Load Instruction
Hi, On the hexagon target, I have written a following combiner pattern. ********************************************* def: Pat<(i64 (or (i64 (shl (i64 (extloadi32 (i32 (add IntRegs:$src1, s11_2ExtPred:$offset1)))), (i32 32))), (i64 (zextloadi32 ADDRriS11_2:$src2)))), (i64 (COMBINE_rr
2012 Jul 06
0
[LLVMdev] MachineOperand: Subreg defines and the Undef flag
> > > That sounds like a bug, probably adjustCopiesBackFrom needs to check > ACopyMI->isFullCopy(). > > Do you have a test case for this? > > Yes and No. Yes because the example is from a unit testcase that I have. No because it manifests itself only with my half baked pass that I was talking about earlier in this thread. Pranav -------------- next part --------------
2012 Jul 06
1
[LLVMdev] MachineOperand: Subreg defines and the Undef flag
On Jul 6, 2012, at 7:30 AM, Pranav D Bhandarkar <pranav.bhandarkar at utexas.edu> wrote: > That sounds like a bug, probably adjustCopiesBackFrom needs to check ACopyMI->isFullCopy(). > > Do you have a test case for this? > > > Yes and No. Yes because the example is from a unit testcase that I have. No because it m...
2012 Nov 09
3
[LLVMdev] inttoptr and basicaa
Hi, I am observing some incorrect behavior in basicaa, wherein two pointers that basicaa should determine to be MustAlias are ending up NoAlias - the other extreme :( I am blaming this on basicaa not handling inttoptr. Here is the relevant IR snippet. -------------------- %sunkaddr36 = ptrtoint %struct.BitParams* %bs to i32 %sunkaddr37 = add i32 %sunkaddr36, 16 %sunkaddr38 = inttoptr i32
2012 Nov 09
0
[LLVMdev] inttoptr and basicaa
On Thu, Nov 8, 2012 at 6:53 PM, Pranav Bhandarkar <pranavb at codeaurora.org> wrote: > Hi, > > I am observing some incorrect behavior in basicaa, wherein two pointers that > basicaa should determine to be MustAlias are ending up NoAlias - the other > extreme :( > I am blaming this on basicaa not handling inttoptr. Here is...
2012 Jul 05
3
[LLVMdev] MachineOperand: Subreg defines and the Undef flag
Hi Jakob, Thanks for your reply. > > The <undef> flag goes on NewMI_1 because the virtual register B isn't live > before that instruction. > > But you probably shouldn't be doing this yourself. Your NewMI code isn't in > SSA form because B has multiple definitions. Just use a REG_SEQUENCE > instruction, and let the register allocator do the transformation
2011 Jul 13
2
[LLVMdev] overflow check
Hi, I have three constants (B, C and V) and V = B + C. I want to find out if B + C wraps around. The way I'll do it is, assuming B and C are both positive, to check if V < B or C. For this I need the values of B, C and V. I tried using APInt as below. *** If (isa<Constant> (B) && isa<Constant> (C) && isa<Constant>(V)) { ConstantInt *CV =
2011 Jul 13
0
[LLVMdev] overflow check
On Wed, Jul 13, 2011 at 12:09 PM, Pranav Bhandarkar <pranavb at codeaurora.org> wrote: > Hi, > > I have three constants (B, C and V) and V = B + C. I want to find out if B + > C wraps around. The way I'll do it is, assuming B and C are both positive, > to check if V < B or C. > For this I need the values of B, C and V....
2011 Jul 20
2
[LLVMdev] Use of -mllvm -debug (clang)
Hi, I have been trying to use the -mllvm -debug option for clang but without much success. Do I need to build in any specific manner for this to work ? On using -mllvm -debug as follows I get the error below. $>clang -ccc-host-triple armv7-none-linux-gnueabi -mfloat-abi=softfp -mfpu=neon -mcpu=cortex-a9 -mllvm -debug fdct.i -S clang (LLVM option parsing): Unknown command line argument
2011 Jul 21
0
[LLVMdev] Use of -mllvm -debug (clang)
On 20 July 2011 20:24, Bhandarkar, Pranav <pranavb at quicinc.com> wrote: > I have been trying to use the -mllvm -debug option for clang but without much success. Do I need to build in any specific manner for this to work ? You need to build LLVM with assertions enabled.
2012 Mar 08
0
[LLVMdev] A question about DBG_VALUE and Frame Index
On Mar 7, 2012, at 5:19 PM, Pranav Bhandarkar <pranavb at codeaurora.org> wrote: > Hi, > > I have a case that is causing me grief in the form of an assert. The prolog > Epilog inserter tries to remove Frame Index references. I have a DBG_VALUE > instruction that looks like this (alongwith the Frame Index). This is for &g...
2012 Mar 09
0
[LLVMdev] Dwarf info and .debug_pubnames section
On Mar 8, 2012, at 2:29 PM, Pranav Bhandarkar wrote: > Hi All, > > I just enabled the generation of dwarf debugging information for Hexagon. It > did not require much save for the setting of a flag in MCAsmInfo. > > However, now I see that the ".debug_pubnames" sections is not generated. I > did read discussio...
2012 Mar 09
1
[LLVMdev] Dwarf info and .debug_pubnames section
Hi Eric, > Nope, it's removed completely. No debugger that I know of uses it at > all and it's > useless for many reasons. Adding the code back in to generate it is > possible (it's > a fairly small commit that's easily reverted), but I see no reason to > have it generated > by default. What are you doing that involves looking for global > variables in the
2012 Apr 10
1
[LLVMdev] Bug in MachineRegisterInfo ?
Hi, I wanted to see the non-debug uses of register 0 (Noreg) and so, I wrote the following piece of code. ***** MRI = &MF.getRegInfo(); if (!MRI->use_nodbg_empty(0)) { for (MachineRegisterInfo::use_nodbg_iterator ri = MRI->use_nodbg_begin(0), re = MRI->use_nodbg_end(); ri != re; ++ri) { MachineInstr *UseMI = &*ri; UseMI->dump ();
2012 May 14
0
[LLVMdev] Register coalescing (Subregs and SuperRegs)
On May 14, 2012, at 4:09 PM, "Pranav Bhandarkar" <pranavb at codeaurora.org> wrote: > Hi, > > Consider this MI code from the hexagon backend. > ------------------------------------------------------------------ > 16B %vreg0<def> = COPY %R0<kill>; IntRegs:%vreg0 > 32B %vreg1<de...
2012 Jul 05
0
[LLVMdev] MachineOperand: Subreg defines and the Undef flag
On Jul 4, 2012, at 10:45 PM, Pranav Bhandarkar <pranavb at codeaurora.org> wrote: > Hi, > > This question relates to the undef flag in the context of sub-register def > operands. > > 1) Firstly, the documentation (comments in the source code) says that in a > sub-register def operand, the "IsUndef" flag...
2012 Aug 31
0
[LLVMdev] Question regarding ReplaceValueWith and ReplaceNodeResults
On Fri, Aug 31, 2012 at 2:48 PM, Pranav Bhandarkar <pranavb at codeaurora.org> wrote: > Hi, > > I am defining Hexagons version of ReplaceNodeResults to change the a node of > the type > A: i8 = INTRINSIC_WO_CHAIN ... , ... , > > To > B: SIGN_EXTEND (A) > > After returning from my function, the type legalizer The...