search for: bfloat16

I don’t think bfloat should be handled this way. What Amara is suggesting is an optimization, i.e., if we drop the information we are still correct. With bfloat, if we do an operation on float16 instead of bfloat16 this is a correctness problem. So that means that either we need to have new opcodes for bfloat or we need to carry around the floating point type in MIR. I think it would be more manageable to have the floating point type long term. That said, it also depends on what we decide to do at the IR lev...

...but in some points it enables fp exceptions and makes an action that can trigger such exception. Using constrained intrinsics would result in performance loss, although the code that actually needs them is very compact. 2. Cores that are used for machine learning usually work with short data (half, bfloat16 or even shorter). Rounding control in this case is much more important than for big cores; using proper rounding in different parts of algorithm can gain precision. Constrained intrinsics is the only way to enforce particular rounding mode. However using them results in poor optimization, which is...

...eptions and makes an action that can trigger such exception. Using >> constrained intrinsics would result in performance loss, although the code >> that actually needs them is very compact. >> 2. Cores that are used for machine learning usually work with short data >> (half, bfloat16 or even shorter). Rounding control in this case is much >> more important than for big cores; using proper rounding in different parts >> of algorithm can gain precision. Constrained intrinsics is the only way to >> enforce particular rounding mode. However using them results in p...

...ject: Re: [llvm-dev] RFC: [GlobalISel] propagating int/float type information > > I don’t think bfloat should be handled this way. What Amara is suggesting is an optimization, i.e., if we drop the information we are still correct. > With bfloat, if we do an operation on float16 instead of bfloat16 this is a correctness problem. > > So that means that either we need to have new opcodes for bfloat or we need to carry around the floating point type in MIR. I think it would be more manageable to have the floating point type long term. > That said, it also depends on what we decide to d...

...EL (11*32+ 5) /* "" LFENCE in kernel entry SWAPGS path */ +#define X86_FEATURE_SEV_ES (11*32+ 6) /* AMD Secure Encrypted Virtualization - Encrypted State */ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */ diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index ac83a0fef628..aad2223862ef 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -580,7 +580,7 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c) * If BIOS has not enabl...

Hi, GlobalISel currently drops all type information relating to the integer/FP distinction during the IR translation pass, as the LLT types only represent whether a value is a scalar/vector/pointer and it’s size/shape. To compensate, later passes use the FP operations on those values to guess what kind of value is being stored within that virtual register. This means that i32/float loads get

Hi, here is the first public post of the patch-set to enable Linux to run under SEV-ES enabled hypervisors. The code is mostly feature-complete, but there are still a couple of bugs to fix. Nevertheless, given the size of the patch-set, I think it is about time to ask for initial feedback of the changes that come with it. To better understand the code here is a quick explanation of SEV-ES first.

Hi, here is the first public post of the patch-set to enable Linux to run under SEV-ES enabled hypervisors. The code is mostly feature-complete, but there are still a couple of bugs to fix. Nevertheless, given the size of the patch-set, I think it is about time to ask for initial feedback of the changes that come with it. To better understand the code here is a quick explanation of SEV-ES first.