search for: bfin

Displaying 20 results from an estimated 49 matches for "bfin".

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2007 Jul 12
1
unable to compile speex-1.1.10
Dear all, I'm Arun, new in this group. and newbie in Linux also. I am working on linphone and I want to compile linphone, but before that I want to compile speex-1.1.10 for uClinux using bfin-gcc. I used these three files : uClinux-dist-2005R3.tar.bz2 bfin-gcc-3.4-2005R3.1.tar.gz speex-1.1.10.tar I sucessfully compiled and installed bfin-gcc, and uClinux. Now when I use the "./configure" it is run sucessfully. After that I use &qu...
2009 Apr 24
2
[PATCH] Blackfin: cleanup astat/cc/hardware loop asm clobbers
...gister as clobbered. Same thing with CC in a few places. Some places make an attempt at clobbering some hardware loop registers, but it's very incomplete compared with how many asm statements actually use hardware loops. Signed-off-by: Mike Frysinger <vapier at gentoo.org> --- libspeex/bfin.h | 15 +++++++++++++++ libspeex/cb_search_bfin.h | 9 ++++----- libspeex/filters_bfin.h | 15 ++++++++++----- libspeex/fixed_bfin.h | 15 +++++++++------ libspeex/lpc_bfin.h | 5 ++++- libspeex/lsp_bfin.h | 2 +- libspeex/ltp_bfin.h | 25 +++++++++...
2009 Jun 03
1
[PATCH] fix -elf2flt usage for bfin-uclinux
...-) diff --git a/configure.ac b/configure.ac index cc30d99..3179521 100644 --- a/configure.ac +++ b/configure.ac @@ -188,8 +188,10 @@ fi]) AC_ARG_ENABLE(blackfin-asm, [ --enable-blackfin-asm Make use of Blackfin assembly optimizations], [if test "$enableval" = yes; then AC_DEFINE([BFIN_ASM], , [Make use of Blackfin assembly optimizations]) - LDFLAGS="-Wl,-elf2flt=-s100000" fi]) +case $host_os in + uclinux) LDFLAGS="-Wl,-elf2flt=-s100000 $LDFLAGS";; +esac AC_ARG_ENABLE(fixed-point-debug, [ --enable-fixed-point-debug Debug fixed-point implementation], [...
2008 Feb 22
1
Patch for Analog Devices compiler & fixed-point AGC
...t; > I agree with Jean-Marc - get ADI to fix it's toolchain. Hi Robin, I'm happy to talk with the blackfin uClinux guru ;-) After hours of fighting with MinGW, which could not run autoconf and automake on my windows... I finally wrote the makefile myself and got Speex compiled with bfin-elf-gcc / bfin-elf-ar. The ELF format is also used by VDSP, so I can link. But this was useless anyway, as the calling conventions are different... Although uClinux is great and the GCC are very good tools, it's not an option for me, because I need: - a small RTOS, where I can control hardw...
2009 Mar 15
5
[LLVMdev] Overlapping register classes
...Generic/BasicInstrs.ll correctly, but that is about it. The Blackfin 32-bit registers divide naturally into several classes. I have modelled these register classes without knowing anything about what the code generator expects. There are data and pointer registers: def D : RegisterClass<"Bfin", [i32], 32, [R0, R1, R2, R3, R4, R5, R6, R7]>; def P : RegisterClass<"Bfin", [i32], 32, [P0, P1, P2, P3, P4, P5, SP, FP]>; For instance, a zero-extending byte load needs the address in a P-reg and can only load a D-reg: def LOAD32p_8z: F1<(outs D:$dst), (ins P:$ptr),...
2016 Apr 29
1
libopus cross compile for bf537 runtime error releated to "-lopus"
Hello all! I'm having trouble with a cross compiled libopus for an embedded application and would like some help. preamble: embedded details: processor: bf537 kernel: Linux release 3.0.8-ADI-2011R1-svn4693, build #2834 Fri Apr 22 12:35:34 ADT 2016 toolchain: bfin-linux-uclibc-gcc release gcc version 4.3.5 (ADI-2011R1-RC4) audio interface: ALSA opus: version: 1.1.2 build process: export CC=/opt/uClinux/bfin-linux-uclibc/bin/bfin-linux-uclibc-gcc export CFLAGS=-funroll-loops\ -ffast-math\ -mfast-fp\...
2010 Feb 16
2
[LLVMdev] Minor cosmetic issues
...al) It would probably be better to use the first style consistently throughout. In -version output, Low Level Virtual Machine (http://llvm.org/): llvm version 2.6svn Optimized build. Built Feb 14 2010(11:05:20). Registered Targets: alpha - Alpha [experimental] arm - ARM bfin - Analog Devices Blackfin [experimental] c - C backend cellspu - STI CBEA Cell SPU [experimental] cooper - PIC16 Cooper [experimental] cpp - C++ backend mips - Mips mipsel - Mipsel msil - MSIL backend msp430 - MSP430 [experimental] pic16 -...
2010 Feb 18
0
[LLVMdev] Minor cosmetic issues
...these points except for > In -version output, > > Low Level Virtual Machine (http://llvm.org/): > llvm version 2.6svn > Optimized build. > Built Feb 14 2010(11:05:20). > > Registered Targets: > alpha - Alpha [experimental] > arm - ARM > bfin - Analog Devices Blackfin [experimental] > c - C backend > cellspu - STI CBEA Cell SPU [experimental] > cooper - PIC16 Cooper [experimental] > cpp - C++ backend > mips - Mips > mipsel - Mipsel > msil - MSIL backend > msp43...
2005 Jul 20
1
problem compiling with linux
...what you said, to complile just libspeex, as there was no "configure" file inside the folder "libspeex" I copied it from parent directory (I guess I am not wrong doing that), ya it configures well with the command # ./configure --enable-blackfin-asm --enable-fixed-point --host=bfin-uclinux but for the <make> command it is again giving error cd .. && make am--refresh make[1]: Entering directory `/root/Desktop/foruclinux/speex-1.1.10' make[1]: *** No rule to make target `am--refresh'. Stop. make[1]: Leaving directory `/root/Desktop/foruclinux/spe...
2009 Mar 10
2
Problems building celt-0.5.2 for blackfin
Problems building celt-0.5.2 for blackfin. Use the following to configure: #!/bin/sh # bfinconf # Set up configuration to cross compile on blackfin ./configure \ --host=bfin \ --enable-fixed-point \ CC=bfin-uclinux-gcc \ CFLAGS='-O2 '\ '-mfast-fp '\ '-ffast-math '\ '-Wall -Dlinux '\ '-D__linux__ '\ '-fno-strict-aliasing '\ '-...
2008 Jan 07
1
Problem with Blackfin assembly optimizations -- bug in fixed_bfin.h?
...verybody, I'm currently trying to run speex on the Blackfin (BF-537) STAMP evaluation board unter uCLinux. Using 1.2 beta 3, I encountered problems when activating the Blackfin assembler optimizations. Without optimizations for blackfin, i.e. calling ./configure --enable-fixed-point --host=bfin-uclinux everything seems to work fine. But when I add the --enable-blackfin-asm flag to the above call, a speech signal which has been passed through the codec is cleary disturbed (for me, it sounds like the long term prediction (voice pitch detection) fails -- the signal sounds like the speaker h...
2006 May 16
1
new assembler port
...complexity 3, and that was 66 > MIPs. That's from 1.1.12 or svn? > People ask about guidelines for assembly optimization, and if you do some > searching, you will find some tips from Jean-Marc on where to start. Also, > if you look in the source tree for references to Blackfin or bfin, you will > find an example port done by Jean-Marc. Yes, have a look at the _bfin.h, _sse.h and _arm.h files to get an idea of what's useful. Also, note that most calls to *_mem2() functions have been (and are being) converted to the _mem16() version. > You should make sure that you run...
2009 Mar 16
0
[LLVMdev] Overlapping register classes
...s about it. > > The Blackfin 32-bit registers divide naturally into several classes. I > have modelled these register classes without knowing anything about > what > the code generator expects. > > There are data and pointer registers: > > def D : RegisterClass<"Bfin", [i32], 32, [R0, R1, R2, R3, R4, R5, > R6, R7]>; > def P : RegisterClass<"Bfin", [i32], 32, [P0, P1, P2, P3, P4, P5, > SP, FP]>; > > For instance, a zero-extending byte load needs the address in a P-reg > and can only load a D-reg: > > def LOAD32...
2006 May 16
2
new assembler port
Hello, I'm trying to use speex for implementing a VoIP demo application using linphone on an embedded system. At the moment I'm not really able to do real time encoding, and thinking about making an assembler port for speex to the AVR32 architecture. The AVR32 is a new hybrid MCU/DSP fixed point processor running at 120Mhz in my application. Does anyone have experiences/info about the
2014 Mar 03
3
gsm codec compile
...rmv6l' Error: unrecognized option -march=armv6l make[2]: *** [src/k6opt.o] Error 1 ? Here are the lines in the Makefile - ifeq (, $(findstring $(OSARCH) , Darwin SunOS )) ifeq (, $(findstring $(PROC) , x86_64 amd64 ultrasparc sparc64 arm armv5b arm5b armeb hppa2.0 ppc powerpc ppc64 ia64 s390 bfin mipsel mips)) ifeq (, $(findstring $(shell uname -m) , ppc ppc64 alpha armv4l arm5b armv5b armv61 armv7l s390 )) OPTIMIZE+=-march=$(PROC) endif endif endif gcc is - Thread model: posix gcc version 4.6.3 (Debian 4.6.3-14+rpi1) # uname -m armv6l Doug -------------- next part -------------- An H...
2009 Jun 18
2
Asterisk on AVR32
Greetings everyone, I'm trying to compile asterisk for an AVR32 (Atmel NGW100). Buildroot for AVR32 already has the asterisk package, though it has bugs. Firstly it tries to apply a patch for 1.2 on a 1.6, but deleting the contents of the patch file did the trick. Now, the problem is making asterisk. The first error is because asterisk needed to be ./configure:ed. Trying to just do
2009 Sep 18
2
[LLVMdev] OT: intel darwin losing primary target status
...Accept EH_RETURN. (eh_returnjump_p_1, eh_returnjump_p): New. * reg-notes.def (CFA_DEF_CFA, CFA_ADJUST_CFA, CFA_OFFSET, CFA_REGISTER, CFA_RESTORE): New. * rtl.def (EH_RETURN): New. * rtl.h (eh_returnjump_p, maybe_copy_epilogue_insn): Declare. * config/bfin/bfin.md (UNSPEC_VOLATILE_EH_RETURN): Remove. (eh_return_internal): Use eh_return rtx; split w/ epilogue. * config/i386/i386.c (gen_push): Update cfa state. (pro_epilogue_adjust_stack): Add set_cfa argument. When true, add a CFA_ADJUST_CFA note. (ix86_dwarf_...
2008 Feb 12
1
Re: Problem with Blackfin assembly optimizations -- bug in fixed_bfin.h / resampler saturation???
Hi, when I compile with FIXED_DEBUG enabled, I get an error -- both when make tries to build testenc.o and when I try to link my app against the speex lib: lorenz@panelmaker:~/Blackfin/tests/speex_loopthrough$ make bfin-uclinux-gcc -c -g -I/home/lorenz/include -o main.o main.c bfin-uclinux-gcc -gl -elf2flt -L/home/lorenz/lib -o speex_through main.o -lspeex_debug -lspeexdsp -lm /home/lorenz/lib/libspeex_debug.a(bits.o): In function `speex_bits_set_bit_buffer': /home/lorenz/Blackfin/speex-1.2beta3/libspeex/bits....
2009 Sep 18
0
[LLVMdev] OT: intel darwin losing primary target status
On Sep 18, 2009, at 10:43 AM, Jack Howarth wrote: > On Fri, Sep 18, 2009 at 10:28:15AM -0700, Nick Kledzik wrote: >> So, when these test cases are run, is the binary linked against /usr/ >> lib/libgcc_s.10.5.dylib? or against some just built libgcc_s. >> 10.5.dylib? >> or against some just build libgcc_s.dylib? If either of the >> latter, then >> if you
2015 May 21
2
[LLVMdev] How can I remove these redundant copy between registers?
Hi, I've been working on a Blackfin backend (llvm-3.6.0) based on the previous one that was removed in llvm-3.1. llc generates codes like this: 29 p1 = r2; 30 r5 = [p1]; 31 p1 = r2; 32 r6 = [p1 + 4]; 33 r5 = r6 + r5; 34 r6 = [p0 + -4]; 35 r5 *= r6; 36 p1 = r2; 37 r6 = [p1 + 8]; 38 p1 = r2; p1 and r2 are in different register classes. A p*