Displaying 2 results from an estimated 2 matches for "bfd661b7".
2012 Jan 20
0
[LLVMdev] 128-bit PXOR requires SSE2
On Fri, Jan 20, 2012 at 2:47 PM, Nicolas Capens
<nicolas.capens at gmail.com> wrote:
> Hi all,
>
> I think I found a bug in LLVM 3.0: When compiling for a target without
> SSE2 support, there were some 128-bit PXOR instructions in the generated
> code.
>
> I traced it down to the following definition in X86InstrSSE.td:
>
> def FsFLD0SS : I<0xEF, MRMInitReg,
2012 Jan 20
2
[LLVMdev] 128-bit PXOR requires SSE2
Hi all,
I think I found a bug in LLVM 3.0: When compiling for a target without
SSE2 support, there were some 128-bit PXOR instructions in the generated
code.
I traced it down to the following definition in X86InstrSSE.td:
def FsFLD0SS : I<0xEF, MRMInitReg, (outs FR32:$dst), (ins), "",
[(set FR32:$dst, fp32imm0)]>,