search for: belatedly

Displaying 20 results from an estimated 133 matches for "belatedly".

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2005 Oct 08
1
Adding (belatedly) Chinese fonts
I have a couple of English language systems that are soon going to have to be able to display Chinese web content. I searched the repositories and wasn't sure exactly which packages ought to be installed to make this work properly. The systems are CentOS 4 w/Gnome. I figured I'd ask here before I just dive in and break things. 8-) Any suggestions would be greatly appreciated.
2008 Feb 21
1
how belatedly copy ACLs?
My original has Posix ACLs (they work fine, that's not the issue). I screwed up my backup by forgetting to copy the ACLs. But now my backup isn't right and I want to fix it. Using the right `rsync` with the right parameter isn't enough to fix the problem. Even the right `rsync` sees this as "no change" and doesn't copy anything (since the file contents haven't
2001 Aug 20
0
rc2 press release, a little belated, but with a nice surprise
This press release went out on a limited basis, but no one seemed to notice the good parts. Read about the contest, and start looking for bugs :) ---- Xiph.org Foundation Announces Ogg Vorbis Release Candidate 2 Featuring Bug-Hunting Contest on the Path to 1.0 The Xiph.org Foundation is proud to announce the latest release candidate of the Ogg Vorbis open source audio codec. This new
2008 Aug 27
2
DTrace merged ready for 7.1
This is a belated heads up to let you know that I have merged DTrace to the releng7 branch in the nick of time before the feature freeze for 7.1. Those astute mailing list readers will note that the commit message appears to have gone missing. Well, either the dog ate it or subversion decided that it was for certain eyes only (and not yours, or mine). I have added a note to src/UPDATING
2005 Jan 17
2
bwplot: how not to draw outliers
RenE J.V. Bertin wrote: > Hello, and (somewhat belated) best wishes for 2005. > > Can one order not to draw outliers in bwplot, or at least exclude them from the vertical axis scaling? If so, how (or what doc do I need to consult)? > The options that have this effect in boxplot() do not appear to have any effect with bwplot (although outline=FALSE in boxplot does *not* change the
2019 Mar 25
5
http error when updating 7.5 ==> 7.6
On 3/23/19 9:19 AM, Bez Thomas wrote: >> On Mar 22, 2019, at 9:52 PM, Fred Smith <fredex at fcshome.stoneham.ma.us> wrote: >> >> Was just doing a (very) belated update on a 7.5 system and ran into >> this set of errors: >> > >> Some delta RPMs failed to download or rebuild. Retrying.. >> > > >> >> so, anybody know why
2019 Mar 23
2
http error when updating 7.5 ==> 7.6
Was just doing a (very) belated update on a 7.5 system and ran into this set of errors: ================================================================================ Package Arch Version Repository Size ================================================================================ Updating: polkit x86_64 0.112-18.el7_6.1
2017 Oct 21
2
Why dup(), again and again?
On Fri, 20 Oct 2017, David Newall wrote: > WHAT CAN I DO TO HELP STEWARD THIS CHANGE INTO THE MASTER SOURCE? > What do I need to do? Stop yelling and go file a bug at https://bugzilla.mindrot.org/ As I mentioned previously, your suggested change is wrong and we'd (at least) need to replace fd 1 with /dev/null prior to assigning it to the channel. -d
2018 Mar 29
4
Mapping virtual registers to physical registers
Hi, In the context of MachineCode custom inserter, I'm trying to enforce the mapping of virtual register to a physical one. According to the documentation https://llvm.org/docs/CodeGenerator.html#mapping-virtual-registers-to-physical-registers There are two ways: the direct one and the indirect ones. The indirect ones refer VirtRegMap class that I've never found. So I tried the direct
2018 Mar 30
0
Mapping virtual registers to physical registers
Hi again, After further investigation, I've found that the private PhysRegUseDefLists array ("head of use/def list for physical register") from MachineRegisterInfo class seems to be empty. But I didn't found any methods for updating such data structure. How/where this "use/def list" should be managed ? Is the documentation
2006 Apr 21
5
optim "CG" bug w/patch proposal (PR#8786)
Dear R team, when using optim with method "CG" I got the wrong $value for the reported $par. Example: f<-function(p) { if (!all(p>-.7)) return(2) if (!all(p<.7)) return(2) sin((p[1])^2)*sin(p[2]) } optim(c(0.1,-0.1),f,method="CG",control=list(trace=0,type=1)) $par 19280.68 -10622.32 $value -0.2346207 # should be 2!
2023 Nov 09
2
2.8.1 build buglet: sockdebug.c
I am (belatedly) updating pkgsrc to 2.8.1 (+ bugfix). (FWIW, I think a 2.8.1.1 or 2.8.2 immediately with the fix is in order. >From a packaging viewpoint, the effort to update for a release is about 3 minutes plus time to adapt anythhing that has changed. So I'd much rather have releases more often.) In...
2007 Dec 12
1
Re: VMware tools in standard CentOS [ was Re: www.centos.org - Contact the CentOS Development Team Form ]
[ Sorry for the very belated response ] Thanks, Tru. What is the process for Sean's work to make it into the standard CentOS5 and 5.1 repositories? How will the tools package get updated as you patch the kernel? Perhaps we should cc Sean on the email? His home page on the Duke server has no contact information. Thanks, Andrew [ Resent to the centos-virt email list, as recommended by
2018 Apr 08
0
[cfe-dev] [RFC] Open sourcing and contributing TAPI back to the LLVM community
To belatedly second Juergen, yes I think the concept of TBD files is great, and not just useful to the specific XCode situation of proprietary libraries. For example the mapfiles[1] of Illumos are exactly analogous and used not because the libc of Illumos is closed source (it isn't) but rather to ensure...
2008 Jan 04
3
Mark Spencer and guest(s) LIVE today at 12 Noon EST - 11 Central - 17:00 UTC
TODAY, Friday January 4th at 12 Noon EST, 11 AM Central, 9AM Pacific, Mountain figure it out, 17:00 UTC Mark joins us to talk about IAX, the appliance, what's new in the asterisk worldwide communities and answer any questions you may have. Why not take this opportunity to ask questions or make comments? This conference is the largest *live* online meeting of asterisk users in the world. Each
2015 Mar 20
2
fast doveadm search results
Steffen Kaiser writes: > e.g. put message-id into mail_always_cache_fields > > - From http://dovecot.org/pipermail/dovecot-cvs/2013-May/023261.html > > lib-storage: Allow mail_*cache_fields settings to specify any hdr.* fields ... but I belatedly wrote ... > Maybe you can even add these items into the cache upon delivery, > but someone more knowlegable than I would have to help you with that. The drawback of getting thing in digest form -- you look like a boob when answering late. I defer to Steffen's superior knowledge. Josep...
2013 Feb 05
0
[LLVMdev] MCJIT and Lazy Compilation
Hi Andrew, I was about to write a belated reply to this message (sorry for the delay), but then I realized that pretty much everything useful that I have to say on the subject is contained in this message (which is in a thread Albert Graef already linked to): https://groups.google.com/d/msg/llvm-dev/Rk9cWdRX0Wg/Fa1Mn6cyS9UJ Generally, I do hope that MCJIT will be capable of replacing the old
2017 Jul 27
2
Are there some strong naming conventions in TableGen?
Hi, For the development of a new micro-controller backend, I try to lowering the following store SDNode: t5: ch = store<ST2[%ptr2](align=4)> t0, Constant:i16<3>, FrameIndex:i16<1>, undef:i16 I have defined the following instruction and associated DAG pattern. def MOVSUTO_A_i32o : CLPFPU_A_i32o_Inst<0b1000001101,
2003 Apr 27
4
Bogus rsync "Success" message when out of disk space
Patches welcome, eh, Paul? Upon further (belated) investigation, there are 2 affected places in receiver.c with this error message. Both call write_file(). And write_file is called only in those two places. So that is the appropriate location to patch. Especially since the obvious fix is to use the rewrite code already there for the sparse file writes.
2017 Jul 24
2
How to lower a 'Store' node using the list<dag> pattern.
Hi, I'm trying to complete the lowering for a new microcontroller. I'm using LLVM 3.8. For now this lowering crashes on 'Store' node, which is actually not yet defined. I've tried to map the ISel 'Store' node to architecture specific instructions. I've define the following semantic to my architecture specific instructions: def MOVSUTO_SU_rr :