search for: bdver2

Hi Duncan I am facing a build error about __builtin_iceil when compiled with dragonegg using -ffast-math option. My dragonegg is built with gcc-4.7.0 (I am compiling namd spec benchmark here again). Any idea? g++ -march=bdver2 -save-temps -fplugin=/home/anboyapa/install/bin/dragonegg.so -O2 -march=bdver2 -save-temps -fplugin=/home/anboyapa/install/bin/dragonegg.so -mno-fma -mfma4 -ffast-math -DSPEC_CPU_LP64 Compute.o ComputeList.o ComputeNonbondedUtil.o LJTable.o Molecule.o Patch.o PatchList.o ResultSet.o SimPa...

...Target.cpp and x86_builtins do not have iceil support. I have this tricky situation - I use dragonegg generated LLVM IR as input to clang for some analysis (well it is clang++ actually). Understably,clang cribs looking at __builtin_iceil. Any idea how to resolve that as well? clang++ -O2 -march=bdver2 -mno-fma -save-temps -mfma4 -ffp-contract=fast -DSPEC_CPU_LP64 Compute.o ComputeList.o ComputeNonbondedUtil.o LJTable.o Molecule.o Patch.o PatchList.o ResultSet.o SimParameters.o erf.o spec_namd.o -o namd spec_namd.o: In function `main': spec_namd.ll:(.text+0x2a3):...

...dragonegg generated LLVM IR as input to > clang for some analysis (well it is clang++ actually). Understably,clang cribs > looking at __builtin_iceil. Any idea how to resolve that as well? adding dragonegg support for iceil would solve both problems. Ciao, Duncan. > clang++ -O2 -march=bdver2 -mno-fma -save-temps -mfma4 -ffp-contract=fast > -DSPEC_CPU_LP64 Compute.o ComputeList.o ComputeNonbondedUtil.o LJTable.o > Molecule.o Patch.o PatchList.o ResultSet.o SimParameters.o erf.o > spec_namd.o -o namd > spec_namd.o: In function `main': > spec...

...isabling FMA3). I have used -ffp-contract=fast to turn on this option. (Compilation options and targets pasted below). >>>>>>>> clang version 3.2 (trunk 163295:163308) (llvm/trunk 163295) Target: x86_64-unknown-linux-gnu Thread model: posix (Options to clang) -O3 -march=bdver2 -mavx -mno-fma -mfma4 -ffp-contract=fast -save-temps <<<<<<< Note that BDVER2 supports both FMA3 and FMA4. Also the benchmark was run *successfully* when FMA3 was enabled. Reducing the testcase might take more time but has anyone noticed this issue? For those interested, mis...

...g doesn't have any support for this builtin. Please open a bug report with a minimal test case. Ciao, Duncan. when compiled > with dragonegg using -ffast-math option. My dragonegg is built with gcc-4.7.0 > (I am compiling namd spec benchmark here again). > Any idea? > g++ -march=bdver2 -save-temps -fplugin=/home/anboyapa/install/bin/dragonegg.so > -O2 -march=bdver2 -save-temps -fplugin=/home/anboyapa/install/bin/dragonegg.so > -mno-fma -mfma4 -ffast-math -DSPEC_CPU_LP64 Compute.o ComputeList.o > ComputeNonbondedUtil.o LJTable.o Molecule.o Patch.o PatchList.o Resu...

...gnoring processor) > > this is coming directly from LLVM which doesn't know about bulldozer yet. > >> Is there any plan to support this cpu ? > > I don't know. Hopefully someone who knows something about this will comment. I added a basic description for bdver1 and bdver2 in r145493. LLVM doesn't know many of bulldozer's new instructions though. - Ben > > Ciao, Duncan. > >> >> >> Here the full example the source file doesn't matter. >> >> gcc -s -static -Wall -O2 -march=native -fplugin=dragonegg.so >> -...

...ible for segfault or if it is the optimization somewhere else that is driving the segfault. In the worst case it could be so. I am yet to dive deeper there. Meanwhile, I have some question w.r.t "-fplugin-arg-dragonegg-emit-ir". Lets say I use the following command: [1]. g++ -O2 -march=bdver2 fplugin=dragonegg.so -mno-fma -mfma4 -fplugin-arg-dragonegg-emit-ir -S -ffast-math <test.c> -o <test.ll> Does the above command produce an IR that is already optimized because of "-O2 -ffast-math -mno-fma -mfma4" ? [2]. If I feed the above generated <test.ll> to clang...

...pilation stage introduces the segmentation fault (optimizers, codegen?). It sounds like you are trying to do so already, more comments below. > Meanwhile, I have some question w.r.t "-fplugin-arg-dragonegg-emit-ir". Lets say > I use the following command: > [1]. g++ -O2 -march=bdver2 fplugin=dragonegg.so -mno-fma -mfma4 > -fplugin-arg-dragonegg-emit-ir -S -ffast-math <test.c> -o <test.ll> > Does the above command produce an IR that is already optimized because of "-O2 > -ffast-math -mno-fma -mfma4" ? Yes, it produces optimized IR due to -O2. If...

...t the end for reference] The problem is I have used almost all -disable-* options from llc hidden help. Yet I could not make it equivalent to -O0. Here are my questions: 1. For some reason, I am not able to use -regalloc=fast at -O1. Gives the following error: $ llc -regalloc=fast -O1 -mcpu=bdver2 test.ll LLVM ERROR: regalloc=... not currently supported with -O0 How do I switch to "fast" allocator at -O1? 2. How do I disable following passes: (a) Optimize for code generation (b) Remove dead machine instructions (c) Optimize machine instruction PHIs (...

...> this is coming directly from LLVM which doesn't know about bulldozer yet. >> >>> Is there any plan to support this cpu ? >> >> I don't know. Hopefully someone who knows something about this will comment. > > I added a basic description for bdver1 and bdver2 in r145493. > LLVM doesn't know many of bulldozer's new instructions though. We have implementations for XOP. Again, I'll be pushing it back as soon as we get 3.0 merged. That will take a bit of effort as we have to resolve various AVX conflicts. -D...

...is I have used almost all -disable-* options from llc > hidden help. Yet I could not make it equivalent to -O0. Here are my > questions: > > > 1. For some reason, I am not able to use -regalloc=fast at -O1. Gives > the following error: > > $ llc -regalloc=fast -O1 -mcpu=bdver2 test.ll > LLVM ERROR: regalloc=... not currently supported with -O0 > > How do I switch to "fast" allocator at -O1? > <ping> Not much help on register allocator issue either? > 2. How do I disable following passes: > (a) Optimize for code generation...

Hi Anitha, > http://llvm.org/bugs/show_bug.cgi?id=14185 > I am stuck on analysis. Does any one have alternate suggestions on debugging > llvm? (Please refer to comments for the work done so far) try to reduce a small standalone testcase which is an LLVM IR (.ll) file. Ciao, Duncan.

Hi, http://llvm.org/bugs/show_bug.cgi?id=14185 I am stuck on analysis. Does any one have alternate suggestions on debugging llvm? (Please refer to comments for the work done so far) -- * Anitha* -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20121105/3c6b8af3/attachment.html>

...i7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cannonlake, icelake-client, icelake-server, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, x86-64 ________________________________ From: Doerfert, Johannes <jdoerfert at anl.gov> Sent: Saturday, March 23, 2019 1:15 PM To: J S Cc: via llvm-dev Subject: Re: [llvm-dev] Generating object files more efficiently I would have guessed: object: cla...

Hi Anitha, On 05/11/12 10:29, Anitha Boyapati wrote: > > > On 5 November 2012 14:32, Duncan Sands <baldrick at free.fr > <mailto:baldrick at free.fr>> wrote: > > Hi Anitha, > > > http://llvm.org/bugs/show_bug.__cgi?id=14185 > <http://llvm.org/bugs/show_bug.cgi?id=14185> > I am stuck on analysis. Does any one have

...i7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cannonlake, icelake-client, icelake-server, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, x86-64 ________________________________ From: Doerfert, Johannes <jdoerfert at anl.gov> Sent: Saturday, March 23, 2019 1:15 PM To: J S Cc: via llvm-dev Subject: Re: [llvm-dev] Generating object files more efficiently I would have guessed: object: cla...

On 5 November 2012 14:32, Duncan Sands <baldrick at free.fr> wrote: > Hi Anitha, > > > http://llvm.org/bugs/show_bug.**cgi?id=14185<http://llvm.org/bugs/show_bug.cgi?id=14185> >> I am stuck on analysis. Does any one have alternate suggestions on >> debugging >> llvm? (Please refer to comments for the work done so far) >> > > try to reduce a

...ore-avx-i, haswell, > core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, > cannonlake, icelake-client, icelake-server, knl, knm, k8, athlon64, > athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, > barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, > znver2, > x86-64 > > > ------------------------------ > *From:* Doerfert, Johannes <jdoerfert at anl.gov> > *Sent:* Saturday, March 23, 2019 1:15 PM > *To:* J S > *Cc:* via llvm-dev > *Subject:* Re: [llvm-dev] Generating object fi...

Hi Jan, > if I compile with dragonegg and -march=native I get this message: > 'bdver1' is not a recognized processor for this target (ignoring processor) this is coming directly from LLVM which doesn't know about bulldozer yet. > Is there any plan to support this cpu ? I don't know. Hopefully someone who knows something about this will comment. Ciao, Duncan. >

...hich doesn't know about > bulldozer yet. >>> >>>> Is there any plan to support this cpu ? >>> >>> I don't know.  Hopefully someone who knows something about this > will comment. >> >> I added a basic description for bdver1 and bdver2 in r145493. >> LLVM doesn't know many of bulldozer's new instructions though. > > We have implementations for XOP.  Again, I'll be pushing it back as soon > as we get 3.0 merged.  That will take a bit of effort as we have to > resolve various AVX conflicts. > &gt...