search for: bdnz

...$non_lazy_ptr-"L00000000001$pb")(r4) > li r4,1000 > mtctr r4 > L9: > lwzx r7,r2,r9 ; load > add r6,r7,r3 ; add > stwx r6,r2,r9 ; store > addi r2,r2,4 ; Increment pointer > bdnz L9 ; Decrement count register, branch while not zero > blr > > This is nice code, good GCC. :) Okay, I changed the C backend to emit syntactic loops around the real loops, and it seems to make a big difference. LLVM now generates this code (note that the actual lo...

...nstruction in other >> targets, but I've found nothing... > > See PPCCTRLoops.cpp in the PPC backend. > > -Eli > I took a quick look to PPCCTRLoops.cpp, but I don't think it's the same of my case. The instruction I have defines explicitly a GPR register, while the BDNZ defines and uses an implicit dedicated register. I based my optimization pass on what seen in Hexagon target too, but due to the fact that I have an explicit GPR as loop counter, my instruction defines a virtual register and the fact that the instruction is also a terminator creates all the pro...

On Mon, Feb 23, 2015 at 2:17 PM, Hal Finkel <hfinkel at anl.gov> wrote: > ----- Original Message ----- > > From: "Francois Pichet" <pichet2000 at gmail.com> > > To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > > Sent: Sunday, February 22, 2015 5:34:11 PM > > Subject: [LLVMdev] Question about shouldMergeGEPs in

...om LLVM BB %for.body, ADDRESS TAKEN > Predecessors according to CFG: BB#0 BB#1 > %vreg12<def> = PHI %vreg13, <BB#1>, %vreg11, <BB#0>;CTRRC8:%vreg12,%vreg13,%vreg11 > %vreg13<def> = COPY %vreg12<kill>; CTRRC8:%vreg13,%vreg12 > %vreg13<def> = BDNZ8 %vreg13, <BB#1>; CTRRC8:%vreg13 > B <BB#2> > Successors according to CFG: BB#2 BB#1 Phi-elim works by inserting copies in the PHI predecessors before the first terminator. That isn't possible here since the first terminator defines the value of %vreg13 we want to...

On Wed, Jul 25, 2012 at 12:48 AM, Michele Scandale <michele.scandale at gmail.com> wrote: > Dear all, > > I'm working on an exploratory backend on llvm. In the instruction set I'm using > I have an instruction (called DECJNZ) that decrements a register and, if the > decremented value is not zero, jumps (with a relative jump) to a given offset. > > I've

...li r2,0 lwz r9,lo16(L_Array$non_lazy_ptr-"L00000000001$pb")(r4) li r4,1000 mtctr r4 L9: lwzx r7,r2,r9 ; load add r6,r7,r3 ; add stwx r6,r2,r9 ; store addi r2,r2,4 ; Increment pointer bdnz L9 ; Decrement count register, branch while not zero blr This is nice code, good GCC. :) Okay, LLVM currently generates this code from the CBE: void test(int l7_X) { unsigned l8_indvar; unsigned l8_indvar__PHI_TEMPORARY; int *l14_tmp_2E_5; int l7_tmp_2E_9; unsig...

On Tue, 4 May 2004, Patrick Flanagan wrote: > I was able to run through all the C/C++ benchmarks in SPEC using LLVM. > I'm on OS X 10.3.3. I did a quick comparison between LLVM (latest from > CVS as of 4/27) and gcc 3.3 (Apple's build 20030304). For simplicity's > sake, the only flag I used was -O3 for each compiler and I was using > the C backend to generate native

...# =>This Inner Loop Header: > Depth=1 > slw 8, 5, 4 > ld 9, .LC1 at toc@l(7) > addi 5, 5, 4 > add 8, 8, 6 > extsw 8, 8 > sldi 8, 8, 2 > lwzx 8, 9, 8 > addi 9, 3, 16 > stw 8, 0(3) > mr 3, 9 > bdnz .LBB0_1 > > there are two things wrong here, first: > > ld 9, .LC1 at toc@l(7) > > this load is loop invariant, and should be hoisted (but was not). The problem of the non-hoisted TOC load was a backend deficiency, now fixed in r230553. Thanks for providing this example. I...

..., ADDRESS TAKEN > > Predecessors according to CFG: BB#0 BB#1 > > %vreg12<def> = PHI %vreg13, <BB#1>, %vreg11, > > <BB#0>;CTRRC8:%vreg12,%vreg13,%vreg11 %vreg13<def> = COPY > > %vreg12<kill>; CTRRC8:%vreg13,%vreg12 %vreg13<def> = BDNZ8 %vreg13, > > <BB#1>; CTRRC8:%vreg13 B <BB#2> > > Successors according to CFG: BB#2 BB#1 > > > Phi-elim works by inserting copies in the PHI predecessors before the > first terminator. That isn't possible here since the first terminator > defi...

Dear all, I'm working on an exploratory backend on llvm. In the instruction set I'm using I have an instruction (called DECJNZ) that decrements a register and, if the decremented value is not zero, jumps (with a relative jump) to a given offset. I've described in tablegen this instruction as follow: def DECJNZ : Instruction { let Namespace = "MyTarget"; let

I was able to run through all the C/C++ benchmarks in SPEC using LLVM. I'm on OS X 10.3.3. I did a quick comparison between LLVM (latest from CVS as of 4/27) and gcc 3.3 (Apple's build 20030304). For simplicity's sake, the only flag I used was -O3 for each compiler and I was using the C backend to generate native code for PPC. Most of the LLVM results were close to gcc

...g6 G8RC:%vreg5 %vreg7<def> = ADD4 %vreg6<kill>, %vreg3; GPRC:%vreg7,%vreg6,%vreg3 STW %vreg7<kill>, 0, %vreg5<kill>; mem:Volatile ST4[@a](tbaa=!"int") GPRC:%vreg7 G8RC:%vreg5 %vreg13<def> = COPY %vreg12<kill>; CTRRC8:%vreg13,%vreg12 %vreg13<def> = BDNZ8 %vreg13, <BB#1>; CTRRC8:%vreg13 B <BB#2> Successors according to CFG: BB#2 BB#1 but with default phi elimination I get: 0B BB#0: derived from LLVM BB %entry Live Ins: %X3 %vreg2<def> = COPY %X3<kill>; G8RC:%vreg2 %vreg4<def> = LI 2048; G...