search for: bdce

...at I can encode them into the tuner? The test program can be found here: https://gist.github.com/kavon/92d153cdd54ce9b77162af3af47d4c95 Here's what happens: kavon at cronus:~/m/autotune|master⚡*? ➤ /Users/kavon/msr/llvm5/bin/opt -inline -mem2reg -inferattrs -ipconstprop -gvn -simplifycfg -bdce -sink -dse -adce -instcombine -early-cse-memssa -early-cse-memssa -dse -adce -simplifycfg -sink -ipconstprop -gvn -bdce -instcombine -jump-threading -inline -sroa ./src/apps/raytracer.bc -o ./out/raytracer_opt1043.bc 0 opt 0x000000010ebd4498 llvm::sys::PrintStackTrace(llvm::ra...

> > > > - Dead code elimination (ADCE, BDCE) > > > Regarding BDCE: The trivialized values might indeed be irrelevant to > later calculations, but might harm the debugging experience? If BDCE > only was applied at O2 and higher, that's likely not a huge loss. > Regular DCE (meaning without the bit-tracking parts) is prob...

...problem, >> but didn't really succeed, let me see again.. > > > While the demanded bits analysis in InstCombine doesn't handle multi-use scenarios (apart from cases where a specific use may be reduced to an instruction operand), it should be possible to handle this as part of BDCE. This would require a) computing demanded bits for the shift amount in the DemandedBits analysis, which currently doesn't happen, and b) replacing a sext with a zext in BDCE if the top bit of the source operand is not demanded. > > Nikita > >> >> > 2) Are we possibly mis...

...or non-redundant loads as those could fail in different ways and locations while executing. These optimizations will also reduce the overall amount of code going to the code generator helping both linker input size and code generation speed. Dead code elimination - Dead code elimination (ADCE, BDCE) - Dead store elimination - Parts of CFG Simplification - Removing branches and dead code paths and not including commoning and speculation Basic Scalar Optimizations - Constant propagation including SCCP and IPCP - Constant merging - Instruction Combining - Inlining: always_inline and nor...

...;t really succeed, let me see again.. > > > > > > > > > While the demanded bits analysis in InstCombine doesn't handle multi-use scenarios (apart from cases where a specific use may be reduced to an instruction operand), it should be possible to handle this as part of BDCE. This would require a) computing demanded bits for the shift amount in the DemandedBits analysis, which currently doesn't happen, and b) replacing a sext with a zext in BDCE if the top bit of the source operand is not demanded. > > > > > > Nikita > > > > > >...

Thanks for taking a look! On Tue, Oct 1, 2019 at 9:09 PM Philip Reames <listmail at philipreames.com> wrote: > On 9/27/19 1:40 PM, Roman Lebedev via llvm-dev wrote: > > In https://reviews.llvm.org/D68103 the InstCombine learned that shift-by-sext > > is simply a shift-by-zext. > > Just to make sure I'm following, the reasoning here is that the shift > amount must

...72,250 685 SLP # vector instructions generated 1,256,401 566 adce # instructions removed 67,020,774 13,835,126 basicaa # times a GEP is decomposed 11,154 26 basicaa # times the limit to decompose GEPs is reached 153,613 324 bdce # instructions removed (unused) 198,495 2 bdce # instructions trivialized (dead bits) 298,621 0 cfl-od-aa Maximum compressed graph 58,462,719 0 cfl-od-aa Number Search Steps 48,401 0 cfl-od-aa # NoAlias results absed on...

...t; 1,256,401 566 adce # instructions removed >> >> 67,020,774 13,835,126 basicaa # times a GEP is decomposed >> >> 11,154 26 basicaa # times the limit to decompose GEPs >> is reached >> >> 153,613 324 bdce # instructions removed (unused) >> >> 198,495 2 bdce # instructions trivialized (dead >> bits) >> >> 298,621 0 cfl-od-aa Maximum compressed graph >> >> 58,462,719 0 cfl-od-aa Number Search Steps...

...e -instcombine -tailcallelim -simplifycfg -reassociate -domtree -loops -loop-simplify -lcssa -loop-rotate -licm -loop-unswitch -instcombine -scalar-evolution -loop-simplify -lcssa -indvars -loop-idiom -loop-deletion -loop-unroll -mldst-motion -domtree -memdep -gvn -memdep -memcpyopt -sccp -domtree -bdce -instcombine -lazy-value-info -jump-threading -correlated-propagation -domtree -memdep -dse -loops -loop-simplify -lcssa -licm -adce -simplifycfg -domtree -instcombine -barrier -float2int -domtree -loops -loop-simplify -lcssa -loop-rotate -branch-prob -block-freq -scalar-evolution -loop-accesses -l...

...nstcombine -tailcallelim -simplifycfg -reassociate -domtree -loops -loop-simplify -lcssa -loop-rotate -licm -loop-unswitch -instcombine -scalar-evolution -loop-simplify -lcssa -indvars -loop-idiom -loop-deletion -loop-unroll -mldst-motion -domtree -memdep -gvn -memdep -memcpyopt -sccp -domtree -bdce -instcombine -lazy-value-info -jump-threading -correlated-propagation -domtree -memdep -dse -loops -loop-simplify -lcssa -licm -adce -simplifycfg -domtree -instcombine -barrier -float2int -domtree -loops -loop-simplify -lcssa -loop-rotate -branch-prob -block-freq -scalar-evolution -loop-access...

I think it would make sense for (1) and (2). I am not sure if (3) is feasible in instcombine. (I am not too familiar with LoopInfo) For the Octasic's Opus platform, I modified shouldMergeGEPs in our fork to: if (GEP.hasAllZeroIndices() && !Src.hasAllZeroIndices() && !Src.hasOneUse()) return false; return Src.hasAllConstantIndices(); // was return false;

(Adding "LLVM Dev") My variant is up as https://reviews.llvm.org/D23876 -david From: George Burgess IV <george.burgess.iv at gmail.com<mailto:george.burgess.iv at gmail.com>> Date: Wednesday, August 24, 2016 at 3:17 PM To: David Callahan <dcallahan at fb.com<mailto:dcallahan at fb.com>> Subject: Re: CFLAA Hi! > I see there is on going work with alias

...or non-redundant loads as those could fail in different ways and locations while executing. These optimizations will also reduce the overall amount of code going to the code generator helping both linker input size and code generation speed. Dead code elimination - Dead code elimination (ADCE, BDCE) - Dead store elimination - Parts of CFG Simplification - Removing branches and dead code paths and not including commoning and speculation Basic Scalar Optimizations - Constant propagation including SCCP and IPCP - Constant merging - Instruction Combining - Inlining: always_inline and nor...

Hi Everyone, We caught a report for a failed self test when using Clang 5.0 and 6.0 with -DDEBUG and -O1 (i.e., a "debug build"). The code is question is located at https://github.com/weidai11/cryptopp/blob/master/cham-simd.cpp . It is the SSSE3 code path for CHAM64. Other optimizations levels are OK for Clang. GCC, ICC and MSVC are OK. The code is valgrind, Sanitizer, Coverity and

...g -reassociate -domtree -loops > -loop-simplify -lc > ssa -loop-rotate -licm -loop-unswitch -instcombine -scalar-evolution > -loop-simplify -lcssa -indvars -loop-idiom -loop-deletion > -loop-unroll -memdep -mldst-motion -domtree -memdep -gvn -memdep > -memcpyopt -sccp -dom > tree -bdce -instcombine -lazy-value-info -jump-threading > -correlated-propagation -domtree -memdep -dse -loops -loop-simplify > -lcssa -licm -adce -simplifycfg -domtree -instcombine -barrier > -domtree -loops -loop-sim > plify -lcssa -loop-rotate -branch-prob -block-freq -scalar-evolution > -l...

Hi Zhoulai, I am trying to modify "LoopUnrollPass" in llvm which produces multiple copies of loop equal to the loop unroll factor.Currently, using multicore architecture, say 3 for example and the execution goes like: for 3 cores if there are 9 iterations of loop core instruction 1 0,3,6 2 1,4,7 3 2,5,8 But I want to to

...-simplifycfg -reassociate -domtree -loops -loop-simplify > -lcssa -loop-rotate -licm -loop-unswitch -instcombine -scalar-evolution > -loop-simplify -lcssa -indvars -loop-idiom -loop-deletion -loop-unroll > -memdep -mldst-motion -domtree -memdep -gvn -memdep -memcpyopt -sccp > -domtree -bdce -instcombine -lazy-value-info -jump-threading > -correlated-propagation -domtree -memdep -dse -loops -loop-simplify -lcssa > -licm -adce -simplifycfg -domtree -instcombine -barrier -float2int -domtree > -loops -loop-simplify -lcssa -loop-rotate -branch-prob -block-freq > -scalar-evoluti...

...efd8f-73e7-4956-bb96-0c03ea21bff9" /dev/sda4: UUID="12DC737EDC735B45" TYPE="ntfs" PARTUUID="95f8994c-a8ad-48f5-9fbb-eda67c56f6e3" /dev/sda5: UUID="de45b7f8-d072-4f7e-b9be-a62428db3fbb" TYPE="xfs" PARTUUID="8c00cc67-1063-4889-bdce-6f6259ba1491" /dev/sda8: LABEL="RECOVERY" UUID="74CCE22FCCE1EAF6" TYPE="ntfs" PARTLABEL="Basic data partition" PARTUUID="7c95ff6d-d945-4479-9100-f66aa81a403e" /dev/mapper/centos-swap: UUID="30ca7d38-a0df-4473-a1d0-dc7a1fd41458" TYPE...

Morning all, I have a HP Envy dual boot system (Win8 for serious stuff, i.e. Train Sim and Flight Sim) and Centos 7 for everything else. In the past I've had the occasional problem where an update on the windows side has updated the UEFI boot sequence but using efibootmgr has always fixed it. On Friday I discovered that my HDD was failing so I tried using Clonezilla to move it on to a new

...Release+Asserts build llvm[2]: Compiling PtrUseVisitor.cpp for Release+Asserts build llvm[3]: Compiling AlignmentFromAssumptions.cpp for Release+Asserts build llvm[2]: Compiling RegionInfo.cpp for Release+Asserts build llvm[3]: Compiling X86FixupLEAs.cpp for Release+Asserts build llvm[3]: Compiling BDCE.cpp for Release+Asserts build llvm[2]: Compiling RegionPass.cpp for Release+Asserts build llvm[3]: Compiling X86FloatingPoint.cpp for Release+Asserts build llvm[3]: Compiling ConstantHoisting.cpp for Release+Asserts build llvm[3]: Compiling SelectionDAGDumper.cpp for Release+Asserts build llvm[2]:...