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0fbb43c6
2012 Aug 19
1
[PATCH 08/10] drm/nouveau: use ioread32_native/iowrite32_native for fifo control registers
...o I miss something important why was it written this way?
---
drivers/gpu/drm/nouveau/core/engine/fifo/base.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/base.c b/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
index 543fcaf..bbb43c6 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
@@ -122,14 +122,14 @@ u32
_nouveau_fifo_channel_rd32(struct nouveau_object *object, u32 addr)
{
struct nouveau_fifo_chan *chan = (void *)object;
- return ((volatile u32 *)chan->...