Displaying 3 results from an estimated 3 matches for "bb_crit_edge".
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bb2_crit_edge
2010 Jun 12
0
[LLVMdev] experimenting with partial evaluation
...a ne, Takumi
-------------- next part --------------
fib(2)=1
GV:0x309e20
FN:0x309e20
RAW:0xb40070
a0=0x311868
Ffib8=0x31f1d8<_Z3fibi1>
define internal i32 @_Z3fibi1() nounwind readnone {
entry:
%0 = icmp sgt i32 2, 2 ; <i1> [#uses=1]
br i1 %0, label %entry.bb_crit_edge, label %entry.bb2_crit_edge
entry.bb2_crit_edge: ; preds = %entry
br label %bb2
entry.bb_crit_edge: ; preds = %entry
br label %bb
bb: ; preds = %bb, %entry.bb_crit_edge
%lsr.iv = phi i3...
2010 Jun 11
2
[LLVMdev] experimenting with partial evaluation
Hello !
I wanted to experiment with partial evaluation and llvm seems to be the
right tool for this, but since I'm new to it of course I'm a bit lost !
I'll try to explain what I want to do in the simplest possible way :
I have a C program.
In this program, there is a function f( a,b ).
I have a value A for a.
I want to specialise f() so I get a function fA( b ) which is the same as
2010 Aug 11
1
[LLVMdev] Need advice on writing scheduling pass
...simplified as much as possible. For example, the
header BB of a loop is transformed as follows (note that information in
LiveVariables is not updated, so there may exist inconsistencies):
BB2: preheader, BB3: header & latch, BB4: exit
(before transformation)
BB#2: derived from LLVM BB %entry.bb_crit_edge
Predecessors according to CFG: BB#0
%reg1025<def> = MOVr %reg1034<kill>, pred:14, pred:%reg0, opt:%reg0
%reg1024<def> = MOVr %reg1033<kill>, pred:14, pred:%reg0, opt:%reg0
%reg1036<def> = MOVi 0, pred:14, pred:%reg0, opt:%reg0
%reg10...