search for: bb9

...dentical or redundant. For instance, return: ; preds = %min.exit ret i32 0 bb15: ; preds = %min.exit ret i32 0 or, bb7.i: ; preds = %bb1.i br label %bb3.i bb9.i: ; preds = %bb1.i br label %bb3.i I think it is safe to remove the blocks bb7.i, bb9.i, bb15 while replacing each jump to bb15 with return and jumps to bb7.i, bb9.i with bb3.i. Is there any opt pass I can apply to the code to merge or remove these...

...----------------------------------------------------------- void %bsloop(int %n, int %pM, %struct.Params* %ps) { entry: %pM = cast int %pM to uint ; <uint> [#uses=1] %tmp1822 = setgt int %pM, 0 ; <bool> [#uses=1] br bool %tmp1822, label %bb9.outer, label %return bb9.outer: ; preds = %bb12, %entry %indvar23 = phi uint [ 0, %entry ], [ %indvar.next24, %bb12 ] ; <uint> [#uses=1] br label %bb9 bb1: ; preds = %bb9 %tmp = tail call double %mtrandres53( sbyte 1 ) ; <...

...; j<3; j++) sum += 2; } return sum; } //////////////////////////////////////////////////////////// (It returns 105 when executed.) The IR corresponding to the above is: ///////////////////////LLVM IR////////////////////////////// define i32 @foo() nounwind { entry: br label %bb9.outer.us bb9.outer.us: ; preds = %bb9.outer.us, %entry %indvar42 = phi i32 [ 0, %entry ], [ %indvar.next48, %bb9.outer.us ] ; <i32> [#uses=2] %sum.0.pn.ph.us = phi i32 [ 0, %entry ], [ %sum.1.lcssa.us, %bb9.outer.us ] ; <i32> [#uses=1]...

...preds = %min.exit >>   ret i32 0 >> >> bb15:                                             ; preds = %min.exit >>   ret i32 0 >> >> or, >> >> bb7.i:                                            ; preds = %bb1.i >>   br label %bb3.i >> >> bb9.i:                                            ; preds = %bb1.i >>   br label %bb3.i >> >> I think it is safe to remove the blocks bb7.i, bb9.i, bb15 while >> replacing each jump to bb15 with return and jumps to bb7.i, bb9.i with >> bb3.i. >> >> Is there any...

...at I don't understand. Question as comment in code //where is t comming from, what is phi inverse rAC <- function(name, n, d, theta){ #generic function for Archimedean copula simulation illegalpar <- switch(name, clayton = (theta < 0), gumbel = (theta < 1), frank = (theta < 0), BB9 = ((theta[1] < 1) | (theta[2] < 0)), GIG = ((theta[2] < 0) | (theta[3] < 0) | ((theta[1]>0) & (theta[3]==0)) | ((theta[1]<0) & (theta[2]==0)))) if(illegalpar) stop("Illegal parameter value") independence <- switch(name, clayton = (theta == 0), gumbel = (theta...

...; preds = %min.exit > ret i32 0 > > bb15: ; preds = %min.exit > ret i32 0 > > or, > > bb7.i: ; preds = %bb1.i > br label %bb3.i > > bb9.i: ; preds = %bb1.i > br label %bb3.i > > I think it is safe to remove the blocks bb7.i, bb9.i, bb15 while > replacing each jump to bb15 with return and jumps to bb7.i, bb9.i with > bb3.i. > > Is there any opt pass I can apply to the...

...gt;>> >>> bb15: ; preds = %min.exit >>> ret i32 0 >>> >>> or, >>> >>> bb7.i: ; preds = %bb1.i >>> br label %bb3.i >>> >>> bb9.i: ; preds = %bb1.i >>> br label %bb3.i >>> >>> I think it is safe to remove the blocks bb7.i, bb9.i, bb15 while >>> replacing each jump to bb15 with return and jumps to bb7.i, bb9.i with >>> bb3.i. >>&g...

...i32 %tmp4 = getelementptr i8** %argv, i32 1 %tmp5 = load i8** %tmp4, align 4 %tmp6 = call i32 @atoi( i8* %tmp5 ) nounwind %tmp7 = icmp eq i32 %tmp6, 1 %tmp78 = zext i1 %tmp7 to i8 %toBool = icmp ne i8 %tmp78, 0 br i1 %toBool, label %bb, label %bb9 bb: ; preds = %L2 ptrtoint i8* inttoptr (i32 1 to i8*) to i32 br label %bb10* *bb9: ; preds = %L2 ptrtoint i8* inttoptr (i32 2 to i8*) to i32 br label %bb10 bb10: ; preds = %bb9, %bb %x.0 = phi i32 [ 2, %bb9 ], [ 1, %bb ]...

On Jul 23, 2008, at 8:47 PM, kapil anand wrote: > > Specifically, I need a way to represent indirect branch instruction > (in binary) as an equivalent LLVM instruction. With switch > instruction , I would have to list all the possible targets and then > initialize the corresponding instruction. I was just thinking > whether it might be possible to have some kind of

...ions. For your example, it should emit something like: .text .align 4 .globl _sum_d _sum_d: subl $12, %esp movl 20(%esp), %eax movl 16(%esp), %ecx cmpl $0, %eax jne LBB_sum_d_2 # cond_true.preheader LBB_sum_d_1: # entry.bb9_crit_edge pxor %xmm0, %xmm0 jmp LBB_sum_d_5 # bb9 LBB_sum_d_2: # cond_true.preheader pxor %xmm0, %xmm0 xorl %edx, %edx LBB_sum_d_3: # cond_true addsd (%ecx), %xmm0 addl $8, %ecx incl %edx cmpl %eax, %edx jne LBB_...

Hi, I'm building a little JIT that creates functions to do array manipulations, eg. sum all the elements of a double* array. I'm writing this in python, generating llvm assembly intructions and piping that through a call to ParseAssemblyString, ExecutionEngine, etc. It's working OK on integer values, but i'm getting nasty floating point exceptions when i try this on double*

...; preds = %min.exit >>>> ret i32 0 >>>> >>>> or, >>>> >>>> bb7.i: ; preds = %bb1.i >>>> br label %bb3.i >>>> >>>> bb9.i: ; preds = %bb1.i >>>> br label %bb3.i >>>> >>>> I think it is safe to remove the blocks bb7.i, bb9.i, bb15 while >>>> replacing each jump to bb15 with return and jumps to bb7.i, bb9.i with >>>&...

...s as I go. Now I've run into branches and I have a crash I don't really understand. Here's the sample IR I'm running llc on to generate assembly: define i32 @ilog2(i32 %x) { entry: %tmp718 = icmp eq i32 %x, 0 ; <i1> [#uses=1] br i1 %tmp718, label %bb9, label %bb5 bb5: ; preds = %bb5, %entry %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb5 ] ; <i32> [#uses=2] %x_addr.015.0 = phi i32 [ %x, %entry ], [ %tmp2, %bb5 ] ; <i32> [#uses=2] %tmp2 = ashr i32 %x_addr.015.0, 1 ; <i32>...

Specifically, I need a way to represent indirect branch instruction (in binary) as an equivalent LLVM instruction. With switch instruction , I would have to list all the possible targets and then initialize the corresponding instruction. I was just thinking whether it might be possible to have some kind of indirect branch where label is a "variable" and not an explicit label present in

yes, this is valid assuming bb9 dominates bb10. Not sure what you mean by "support this", unless your tool doesn't handle certain types of CFG's On Wed, Mar 30, 2016 at 8:12 PM, Xiaochu Liu via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Dear there, > > Is the following phi instruction vali...

Dear there, Is the following phi instruction valid? %j_8 = phi i32 [ %j_100, %"<bb 13>" ], [ %j_9133, %"<bb 10>" ], [ %j_9133, %"<bb 9>" ] Variable %j_9133 is in bb 9. And also this one: %D.1898_8.i = phi i32 [ %D.1898_27.i, %"<bb 18>.i" ], [ -1, %"<bb 23>" ], [ %D.1776_193, %"<bb 4>], [ %D.1776_193,

...ot;\01LC3", i32 0, i32 0), i32 %16) nounwind ; <i32> [#uses=0] br label %bb12 bb7: ; preds = %bb5 %18 = load i32* %x_addr, align 4 ; <i32> [#uses=1] %19 = and i32 %18, 3 ; <i32> [#uses=1] %20 = icmp eq i32 %19, 1 ; <i1> [#uses=1] br i1 %20, label %bb8, label %bb9 bb8: ; preds = %bb7 %21 = call i32 (i8*, ...)* @printf(i8* getelementptr ([16 x i8]* @"\01LC4", i32 0, i32 0)) nounwind ; <i32> [#uses=0] br label %bb12 bb9: ; preds = %bb7 %22 = load i32* %x_addr, align 4 ; <i32> [#uses=1] %23 = icmp eq i32 %22, 63 ; <i1> [...

...OrigVNI passed is @1520. // Exits with two edges into two one-block loops, with one exit block each, which are joined in BB12. // Succs BB6, BB8 BB6: {} // Single block nested loop BB7: // pred BB6, succ BB12 @2948 sibling COPY 121 to 122 BB8: // pred BB5 {} // Single block nested loop BB9: // pred BB8, succ BB12 @2968 sibling COPY 121 to 122 BB12: // joining BB7 and BB9 phi 9 BB13: // Latch block for outer loop, has edge from BB#4 phi 10 } Is there anything else I can provide that might you? /Jonas From: Quentin Colombet [mailto:qcolombet at apple.com] Sent: den 2 december...

Hi, I'm having problems with the LoopIdiomRegognizer crashing on me with An asserting value handle still pointed to this value! UNREACHABLE executed at ../lib/IR/Value.cpp:695! If I remove AU.addPreserved<LoopInfoWrapperPass>(); or AU.addPreserved<AAResultsWrapperPass>(); everything goes well. The C-code triggering this is void foo(int a[10][10]) { int i, j,

..., which are joined in BB12. >> // Succs BB6, BB8 >> >> BB6: >> {} // Single block nested loop >> BB7: // pred BB6, succ BB12 >> @2948 sibling COPY 121 to 122 >> >> BB8: // pred BB5 >> {} // Single block nested loop >> >> BB9: // pred BB8, succ BB12 >> @2968 sibling COPY 121 to 122 >> >> BB12: // joining BB7 and BB9 >> phi 9 >> >> BB13: >> // Latch block for outer loop, has edge from BB#4 >> phi 10 >> } >> >> Is there anything else I can provi...