search for: bb7

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2012 Nov 26
2
[LLVMdev] LSR pass
...SE after LSR again? What is the logic behind this transformation? It seems that a LSR pass should not insert a multiplication, generally..? Thanks, Jonas %_tmp44 = ptrtoint i16* par1 to i16 %_tmp51 = ptrtoint i16* par2 to i16 ... inside loop: *** IR Dump After Canonicalize natural loops *** bb7: (header) ; preds = %bb7.lr.ph, %bb11 %_tmp39 = sub i16 %_tmp35, %_tmp38 %2 = mul i16 %_tmp39, -10 %_tmp41 = add i16 %2, %subframeCount.12.014 %_tmp45 = add i16 %_tmp41, %_tmp44 %_tmp46 = inttoptr i16 %_tmp45 to i16* %_tmp47 = load i16* %_tmp46...
2011 Jul 07
1
[LLVMdev] code generation removes duplicated instructions
Ok. Let me describe the problem again in some detail. The following is the original bitcode from a real testcase: bb7: %46 = load i32* %j, align 4 %47 = add nsw i32 %46, 1 store i32 %47, i32* %j, align 4 br label %bb8 To protect the operand of the store I duplicate the input chain of operands and insert a comparison to check whether the operand of the stores are correct. As a result of this modification t...
2010 Jun 29
0
[LLVMdev] Confuse on getSCEVAtScope
On Jun 29, 2010, at 7:08 AM, ether zhhb wrote: > > why computeSCEVAtScope not try to get the operands in the current > scope like the function do with SCEVCommutativeExpr, like: > > if (const SCEVAddRecExpr *AddRec = dyn_cast<SCEVAddRecExpr>(V)) { > if (!L || !AddRec->getLoop()->contains(L)) { > ... > // Then, evaluate the AddRec. >
2010 Jun 29
2
[LLVMdev] Confuse on getSCEVAtScope
hi all, i have SCEVAddRec {{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1> where Loop0 and Loop1 are brothers (loops at the same level of the loopnest), and Loop0 have a computable backedge taken count. when i call getSCEVAtScope({{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1> , Loop1), it just give me a {{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1>, instead of
2010 May 08
2
[LLVMdev] Remove identical or redundant basic blocks?
...., with opt -O3), the resulting code contains several basic blocks, which I consider identical or redundant. For instance, return: ; preds = %min.exit ret i32 0 bb15: ; preds = %min.exit ret i32 0 or, bb7.i: ; preds = %bb1.i br label %bb3.i bb9.i: ; preds = %bb1.i br label %bb3.i I think it is safe to remove the blocks bb7.i, bb9.i, bb15 while replacing each jump to bb15 with return and jumps to bb7.i, bb9...
2012 Dec 01
1
[LLVMdev] LSR pass
...es? -Hal > > > > Thanks, > > Jonas > > > > > > > > %_tmp44 = ptrtoint i16* par1 to i16 > > %_tmp51 = ptrtoint i16* par2 to i16 > > ... > > inside loop: > > *** IR Dump After Canonicalize natural loops *** > > bb7: (header) ; preds = %bb7.lr.ph, %bb11 > > > > %_tmp39 = sub i16 %_tmp35, %_tmp38 > > %2 = mul i16 %_tmp39, -10 > > %_tmp41 = add i16 %2, %subframeCount.12.014 > > > > %_tmp45 = add i16 %_tmp41, %_tmp44 > > %_tmp46 = inttoptr i16 %_tmp45 to i16* &gt...
2012 Dec 04
0
[LLVMdev] LSR pass
...es? -Hal > > > > Thanks, > > Jonas > > > > > > > > %_tmp44 = ptrtoint i16* par1 to i16 > > %_tmp51 = ptrtoint i16* par2 to i16 > > ... > > inside loop: > > *** IR Dump After Canonicalize natural loops *** > > bb7: (header) ; preds = %bb7.lr.ph, %bb11 > > > > %_tmp39 = sub i16 %_tmp35, %_tmp38 > > %2 = mul i16 %_tmp39, -10 > > %_tmp41 = add i16 %2, %subframeCount.12.014 > > > > %_tmp45 = add i16 %_tmp41, %_tmp44 > > %_tmp46 = inttoptr i16 %_tmp45 to i16* &gt...
2011 Jul 07
0
[LLVMdev] code generation removes duplicated instructions
On 7 July 2011 00:02, D S Khudia <daya.khudia at gmail.com> wrote: > I am trying to add a intrinsic call between the similar two instructions > which either I'll remove or convert to nop in codegen. If the two instructions are only similar in your real example, than you need to make them similar in your test, not identical. Different offsets, different array... If them two are
2010 May 08
2
[LLVMdev] Remove identical or redundant basic blocks?
...cal >> or redundant.  For instance, >> >> return:                                           ; preds = %min.exit >>   ret i32 0 >> >> bb15:                                             ; preds = %min.exit >>   ret i32 0 >> >> or, >> >> bb7.i:                                            ; preds = %bb1.i >>   br label %bb3.i >> >> bb9.i:                                            ; preds = %bb1.i >>   br label %bb3.i >> >> I think it is safe to remove the blocks bb7.i, bb9.i, bb15 while >> repla...
2010 May 08
0
[LLVMdev] Remove identical or redundant basic blocks?
...basic blocks, which I consider > identical > or redundant. For instance, > > return: ; preds = %min.exit > ret i32 0 > > bb15: ; preds = %min.exit > ret i32 0 > > or, > > bb7.i: ; preds = %bb1.i > br label %bb3.i > > bb9.i: ; preds = %bb1.i > br label %bb3.i > > I think it is safe to remove the blocks bb7.i, bb9.i, bb15 while > replacing each jump to bb15 with...
2007 Feb 05
1
[LLVMdev] Misc optimization issue
...p:32:32" target endian = little target pointersize = 32 target triple = "i686-pc-linux-gnu" implementation ; Functions: int %ltst(int %x) { entry: %x = cast int %x to uint ; <uint> [#uses=1] %tmp13 = setgt int %x, 0 ; <bool> [#uses=1] br bool %tmp13, label %bb, label %bb7 bb: ; preds = %bb, %entry %indvar = phi uint [ 0, %entry ], [ %indvar.next, %bb ] ; <uint> [#uses=2] %i.0.0 = cast uint %indvar to int ; <int> [#uses=1] %tmp1 = add int %i.0.0, 1 ; <int> [#uses=1] %in...
2011 Jul 06
2
[LLVMdev] code generation removes duplicated instructions
Hi Renato, I am trying to add a intrinsic call between the similar two instructions which either I'll remove or convert to nop in codegen. Does that kind of seem appropriate for the purpose here? Thanks Daya On Wed, Jul 6, 2011 at 11:55 AM, Renato Golin <renato.golin at arm.com> wrote: > On 6 July 2011 15:57, D S Khudia <daya.khudia at gmail.com> wrote: > > Since I am
2010 May 09
0
[LLVMdev] Remove identical or redundant basic blocks?
..., >>> >>> return: ; preds = %min.exit >>> ret i32 0 >>> >>> bb15: ; preds = %min.exit >>> ret i32 0 >>> >>> or, >>> >>> bb7.i: ; preds = %bb1.i >>> br label %bb3.i >>> >>> bb9.i: ; preds = %bb1.i >>> br label %bb3.i >>> >>> I think it is safe to remove the blocks bb7.i, bb9.i, b...
2011 Nov 21
1
[LLVMdev] Fwd: Order of Basic Blocks
...rator apparently wasn't what I was looking for anyways, it seems it doesn't rreally go top->down. I have a simple example code, where the block follow this path: BB0->BB1 (T), BB8 (F) BB1-> BB2 (T), BB3 (F) BB2-> BB4 BB3-> BB5 BB4-> BB6 BB5-> BB8 (T), BB5 (F) BB6-> BB7 (T), BB4 (F) BB7-> BB8 (T), BB4 (F) BB8 (end) So, this is the basic block flow graph. When I iterate using the ReversePostOrderTraversal iterator, the basic blocks vistied are in this order: BB0, BB1, BB3, BB2, BB7, BB6, BB4, BB5, BB8 Can someone explain why this is and how the BBs are stored...
2009 Sep 13
2
[LLVMdev] PIC16 question
...nters, I've found that PIC16 doesn't put ':' after labels in some cases. Specifically, it looks like basic block labels are emitted without a ':': movwf @__floatunsidf.frame. + 2 movlp .BB1_2 goto .BB1_2 .BB1_2 ; %bb7 movlw 0 banksel @__floatunsidf.frame. but that functions and global variables are. Does lack of a colon mean that the label is private to the file? Is a colon on the basic block harmful (IOW, can I just emit basic block labels with a colon even though they aren't currently)? -Chris
2014 Jan 20
1
ISDN Cause Code 47 Errors
...: 2 Type: CPE] [Jan 14 12:56:04] VERBOSE[13262] sig_pri.c: [Jan 14 12:56:04] -- Accepting call from 'NPANXXXXXX' to '3446711' on channel 0/2, span 4 [Jan 14 12:56:04] VERBOSE[12568] pbx.c: [Jan 14 12:56:04] -- Executing [3446711 at from-pstn:1] NoOp("DAHDI/i4/NPANXXXXXX-bb7", "Seven digits: 3446711") in new stack [Jan 14 12:56:04] VERBOSE[12568] pbx.c: [Jan 14 12:56:04] -- Executing [3446711 at from-pstn:2] GotoIf("DAHDI/i4/NPANXXXXXX-bb7", "0?local-overrides,4143446711,1") in new stack [Jan 14 12:56:04] VERBOSE[12568] pbx.c: [Ja...
2009 Aug 28
1
[LLVMdev] va_arg
...; <[1 x %struct.__va_list_tag]*> [#uses=4] %list12 = bitcast [1 x %struct.__va_list_tag]* %list to i8* ; <i8*> [#uses=2] call void @llvm.va_start(i8* %list12) %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1] br i1 %0, label %bb.nph, label %bb7 bb.nph: ; preds = %entry %1 = getelementptr [1 x %struct.__va_list_tag]* %list, i64 0, i64 0, i32 0 ; <i32*> [#uses=2] %2 = getelementptr [1 x %struct.__va_list_tag]* %list, i64 0, i64 0, i32 3 ; <i8**> [#uses=1] %3 = getelement...
2010 May 09
1
[LLVMdev] Remove identical or redundant basic blocks?
...: ; preds = %min.exit >>>> ret i32 0 >>>> >>>> bb15: ; preds = %min.exit >>>> ret i32 0 >>>> >>>> or, >>>> >>>> bb7.i: ; preds = %bb1.i >>>> br label %bb3.i >>>> >>>> bb9.i: ; preds = %bb1.i >>>> br label %bb3.i >>>> >>>> I think it is safe to remove...
2010 Aug 05
3
[LLVMdev] a problem when using postDominatorTree
...well for small tests, but when I run it on real applications, the > following error occurs: > /Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries. > [1] <<exit node>> {0,21} > [2] %bb1 {1,2} > [2] %bb {3,4} > [2] %entry {5,6} > [2] %bb8 {7,20} > [3] %bb7 {8,9} > [3] %bb2 {10,11} > [3] %bb6 {12,13} > [3] %bb5 {14,19} > [4] %bb4 {15,16} > [4] %bb3 {17,18} > 0 opt 0x085643e8 > Stack dump: > 0. Program arguments: opt > -load=/home/a_i/llvm/llvm-2.7/Release/lib/ConsDumper.so -consdumper -f > -o pbzip2_2s.bc pbzip2.bc -deb...
2016 Feb 08
2
LoopIdiomRegognize vs Preserved
Hi, I'm having problems with the LoopIdiomRegognizer crashing on me with An asserting value handle still pointed to this value! UNREACHABLE executed at ../lib/IR/Value.cpp:695! If I remove AU.addPreserved<LoopInfoWrapperPass>(); or AU.addPreserved<AAResultsWrapperPass>(); everything goes well. The C-code triggering this is void foo(int a[10][10]) { int i, j,