search for: bb5

..."i386-pc-linux-gnu" define i32 @TESTE2(i32 %parami, i32 %paraml, double %paramd) nounwind readnone { entry: %0 = shl i32 %parami, 1 ; <i32> [#uses=1] %varx.110 = add i32 %0, %paraml ; <i32> [#uses=2] %1 = icmp slt i32 %paraml, 1 ; <i1> [#uses=1] br i1 %1, label %bb5, label %bb3 bb3: ; preds = %bb3, %entry %indvar = phi i32 [ %indvar.next, %bb3 ], [ 0, %entry ] ; <i32> [#uses=3] %2 = add i32 %indvar, 2 ; <i32> [#uses=1] %3 = icmp sgt i32 %2, %paraml ; <i1> [#uses=1] %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] br i1 %3,...

...Now I've run into branches and I have a crash I don't really understand. Here's the sample IR I'm running llc on to generate assembly: define i32 @ilog2(i32 %x) { entry: %tmp718 = icmp eq i32 %x, 0 ; <i1> [#uses=1] br i1 %tmp718, label %bb9, label %bb5 bb5: ; preds = %bb5, %entry %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb5 ] ; <i32> [#uses=2] %x_addr.015.0 = phi i32 [ %x, %entry ], [ %tmp2, %bb5 ] ; <i32> [#uses=2] %tmp2 = ashr i32 %x_addr.015.0, 1 ; <i32> [#uses=1]...

...b1 bb2 \ / bb3 | bb4 Now I want to create a new basic block, say bb5 between bb2 & bb3, copy some instructions from bb3 to bb5. Then I want to add between bb2 and bb3, then outgoing edge from bb5 is to be attached with bb4. Finally my program will look like : bb...

...ionB* nocapture %CHAIN. > 190) { > entry: > br i1 undef, label %bb, label %bb3 > > bb: ; preds = %entry > unreachable > > bb3: ; preds = %entry > br i1 undef, label %bb4, label %bb5 > > bb4: ; preds = %bb3 > unreachable > > bb5: ; preds = %bb3 > invoke void undef() > to label %invcont unwind label %lpad > > invcont:...

...0) { >> entry: >> br i1 undef, label %bb, label %bb3 >> >> bb: ; preds = %entry >> unreachable >> >> bb3: ; preds = %entry >> br i1 undef, label %bb4, label %bb5 >> >> bb4: ; preds = %bb3 >> unreachable >> >> bb5: ; preds = %bb3 >> invoke void undef() >> to label %invcont unwind label %lpad >> >> invcont:...

...#uses=2] %2 = getelementptr [1 x %struct.__va_list_tag]* %list, i64 0, i64 0, i32 3 ; <i8**> [#uses=1] %3 = getelementptr [1 x %struct.__va_list_tag]* %list, i64 0, i64 0, i32 2 ; <i8**> [#uses=2] br label %bb bb: ; preds = %bb5, %bb.nph %i.011 = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb5 ] ; <i32> [#uses=1] %sum.012 = phi i32 [ 0, %bb.nph ], [ %14, %bb5 ] ; <i32> [#uses=1] %4 = load i32* %1, align 8 ; <i32> [#uses=3] %5 = icmp ult i32 %4, 48...

...>> br i1 undef, label %bb, label %bb3 >>> >>> bb: ; preds = %entry >>> unreachable >>> >>> bb3: ; preds = %entry >>> br i1 undef, label %bb4, label %bb5 >>> >>> bb4: ; preds = %bb3 >>> unreachable >>> >>> bb5: ; preds = %bb3 >>> invoke void undef() >>> to label %invcont unwind label %lpad &...

Given an instruction like this: br i1 %tmp12, label %bb5, label %bb6 I'm confused as to why Operand(1) = bb6 and not bb5 and why Operand(2) is bb5 and not bb6. Why in the instruction does the true path always list first but when accessing the operands of the instruction, it is backwards? Is there a particular reason for this? -------------- next pa...

...hat the temporary variables created for different basic block are independent from each other, for example in the following IR the temp variables used in the basic block bb: i.e. %tmp, %tmp1, %tmp2 are only dependent on the variables defined in the entry: basic block, and same holds for basic block bb5: i.e. variables %tmp6, %tmp7, %tmp8 etc are only dependent on the variables in the entry block (%limit_addr, %i.. etc) and the temp variables defined in the same basic block. Is this true ?, as far as i have seen, by generating the bitcode for various test codes, and it holds true for all. So, now...

Hi Jakub, interesting patch. I ran it over the Ada testsuite and this picked up some problems even without enabling dse-ssu. For example, "opt -inline -dse -domtree" crashes on the attached testcase. Ciao, Duncan. -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: dom_crash.ll URL:

...googlemail.com> This worked, though the RPO_iterator apparently wasn't what I was looking for anyways, it seems it doesn't rreally go top->down. I have a simple example code, where the block follow this path: BB0->BB1 (T), BB8 (F) BB1-> BB2 (T), BB3 (F) BB2-> BB4 BB3-> BB5 BB4-> BB6 BB5-> BB8 (T), BB5 (F) BB6-> BB7 (T), BB4 (F) BB7-> BB8 (T), BB4 (F) BB8 (end) So, this is the basic block flow graph. When I iterate using the ReversePostOrderTraversal iterator, the basic blocks vistied are in this order: BB0, BB1, BB3, BB2, BB7, BB6, BB4, BB5, BB8 Can so...

Hello, This patch adds non-local DSE optimization. It uses Static Single Use representation. This is my first "big" patch, please be tolerant :-) Please note that optimization is disabled by default. -Jakub -------------- next part -------------- A non-text attachment was scrubbed... Name: dse_ssu.patch Type: application/octet-stream Size: 17352 bytes Desc: not available URL:

...can simply traverse the graph bottom up till the root. The number of nodes encountered would be the number of predecessors. The second way would be to use the special ;preds marker in the llvm IR. Each basic block starts with this line which details the name of its predecessor blocks for example bb5: ; preds bb2, bb3 thus bb5 is preceeded by bb2 and bb3. but, one word of caution, even bb2 and bb3 can be preceeded by some other basic blocks, thus the count for bb5 (number of predecessors) won't be 2, but would be more (depends upon the predecessors of bb2 and bb3). You can also try to...

...tty picture too! Each part of the switch is emitted directly into the DAG, rather than being deferred. This is the function: define i32 @foo(i32 %x, i32 %z) nounwind { entry: switch i32 %x, label %UnifiedReturnBlock [ i32 0, label %bb i32 1, label %bb5 ] bb: ; preds = %entry %tmp4 = mul i32 %z, %x ; <i32> [#uses=1] ret i32 %tmp4 bb5: ; preds = %entry %tmp8 = add i32 %z, %x ; <i32> [#uses=1] ret i32 %tmp8 UnifiedReturnBlock: ; preds = %ent...

Hi! I want to know How to count the number of predecessors for each basic block? Thank You ____________________________________________________________________________________ Never miss a thing. Make Yahoo your home page. http://www.yahoo.com/r/hs

...i execute the pass (opt -load ....) i get an error: Call parameter type does not match function signature! [3 x i8] c"bb\00" i8* call void @branchPredict([3 x i8] c"bb\00", [4 x i8] c"bb1\00") Call parameter type does not match function signature! [4 x i8] c"bb5\00" i8* call void @branchPredict([4 x i8] c"bb5\00", [18 x i8] c"bb3.bb3_crit_edge\00") Broken module found, compilation aborted! 0 libLLVM-2.8.so.1 0x01421628 Stack dump: 0. Program arguments: opt -load /home/inspiron/PhdWork/llvm-2.8/Release/lib/Example.so -Example6 1....

...is for real is ... not obvious at a glance. > I had to construct an example to see the problem, but my example is bit contrived (it depends on starting in the middle of the graph) so I wonder if there is a better counterexample. BB0:y BB1:x,y | | BB2:⊥ BB3:⊥ BB4:⊥ | / | / BB5:x | / \ | / BB6: ? | +-> back-edge to BB1, BB4 BB5 has a definition for x but neither kills nor defines y. No block ever kills y. Let's assume we for whatever reason started in BB5. The first join() at BB6 will yield the set [x] (BB3 and BB4 are un...

I have created a new basic block. Now I want to make copy of instructions from one basic block to another . How to do that ? -- regards, soumya prasad ukil -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20101115/ddb0c4ab/attachment.html>

On Nov 14, 2010, at 12:13 PM, Soumya Prasad Ukil wrote: > I have created a new basic block. Now I want to make copy of instructions from one basic block to another . How to do that ? See CloneBasicBlock @ Transforms/Utils/Cloning.h - Devang

...he switch is emitted directly into the DAG, rather > than being deferred. > > This is the function: > define i32 @foo(i32 %x, i32 %z) nounwind { > entry: > switch i32 %x, label %UnifiedReturnBlock [ > i32 0, label %bb > i32 1, label %bb5 > ] > bb: ; preds = %entry > %tmp4 = mul i32 %z, %x ; <i32> [#uses=1] > ret i32 %tmp4 > bb5: ; preds = %entry > %tmp8 = add i32 %z, %x ; <i32> [#uses=1] > ret i32 %tmp8 > UnifiedReturnBlo...