Displaying 8 results from an estimated 8 matches for "bb1_3".
Did you mean:
bb13
2013 Mar 01
4
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
...add.f64 %fl8, %fl6, %fl7;
> > setp.lt.f64 %p0, %fl8, 0d4010000000000000;
> > setp.lt.f64 %p1, %fl2, %fl0;
> > and.pred %p0, %p0, %p1;
> > @!%p0 bra BB1_3;
> > bra.uni BB1_2;
> > BB1_3:
> > mov.f64 func_retval0, %fl2;
> > ret;
> > }
> >
> > // .globl
> > examples_2E_mandelbrot_2F_calc_2D_mandelbrot_2D_ptx .func (.reg .b64...
2013 Mar 01
0
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
... %fl8, %fl6, %fl7;
> > > setp.lt.f64 %p0, %fl8, 0d4010000000000000;
> > > setp.lt.f64 %p1, %fl2, %fl0;
> > > and.pred %p0, %p0, %p1;
> > > @!%p0 bra BB1_3;
> > > bra.uni BB1_2;
> > > BB1_3:
> > > mov.f64 func_retval0, %fl2;
> > > ret;
> > > }
> > >
> > > // .globl
> > > examples_2E_mandelbrot_2F_calc_2D_mandelbrot_2D_ptx .func (.reg
> >...
2013 Mar 01
0
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
...%fl8, %fl6, %fl7;
>> > setp.lt.f64 %p0, %fl8, 0d4010000000000000;
>> > setp.lt.f64 %p1, %fl2, %fl0;
>> > and.pred %p0, %p0, %p1;
>> > @!%p0 bra BB1_3;
>> > bra.uni BB1_2;
>> > BB1_3:
>> > mov.f64 func_retval0, %fl2;
>> > ret;
>> > }
>> >
>> > // .globl
>> > examples_2E_mandelbrot_2F_calc_2D_mande...
2013 Mar 01
1
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
...%fl6, %fl7;
> >> > setp.lt.f64 %p0, %fl8, 0d4010000000000000;
> >> > setp.lt.f64 %p1, %fl2, %fl0;
> >> > and.pred %p0, %p0, %p1;
> >> > @!%p0 bra BB1_3;
> >> > bra.uni BB1_2;
> >> > BB1_3:
> >> > mov.f64 func_retval0, %fl2;
> >> > ret;
> >> > }
> >> >
> >> > // .globl
> >> >...
2013 Mar 01
2
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
..., %fl6;
BB1_1:
mul.f64 %fl6, %fl5, %fl5;
mul.f64 %fl7, %fl4, %fl4;
add.f64 %fl8, %fl6, %fl7;
setp.lt.f64 %p0, %fl8, 0d4010000000000000;
setp.lt.f64 %p1, %fl2, %fl0;
and.pred %p0, %p0, %p1;
@!%p0 bra BB1_3;
bra.uni BB1_2;
BB1_3:
mov.f64 func_retval0, %fl2;
ret;
}
// .globl examples_2E_mandelbrot_2F_calc_2D_mandelbrot_2D_ptx
.func (.reg .b64 func_retval0)
examples_2E_mandelbrot_2F_calc_2D_mandelbrot_2D_ptx(
.reg .b64
examples_2E_mandelbrot_2F_cal...
2013 Mar 01
0
[LLVMdev] NVPTX CUDA_ERROR_NO_BINARY_FOR_GPU
...fl4;
>聽 聽 聽 聽 聽 聽 聽 聽 add.f64聽 聽 聽 聽 聽 聽 聽 聽 %fl8, %fl6, %fl7;
>聽 聽 聽 聽 聽 聽 聽 聽 setp.lt.f64聽 聽 聽 聽 %p0, %fl8, 0d4010000000000000;
>聽 聽 聽 聽 聽 聽 聽 聽 setp.lt.f64聽 聽 聽 聽 %p1, %fl2, %fl0;
>聽 聽 聽 聽 聽 聽 聽 聽 and.pred聽 聽 聽 聽 聽 聽 聽 %p0, %p0, %p1;
>聽 聽 聽 聽 聽 聽 聽 聽 @!%p0 bra聽 聽 聽 聽 聽 聽 BB1_3;
>聽 聽 聽 聽 聽 聽 聽 聽 bra.uni聽 聽 聽 聽 聽 聽 聽 聽 BB1_2;
> BB1_3:
>聽 聽 聽 聽 聽 聽 聽 聽 mov.f64 func_retval0, %fl2;
>聽 聽 聽 聽 聽 聽 聽 聽 ret;
> }
>
>聽 聽 聽 聽 聽 聽 聽 聽 // .globl聽 聽 聽 聽 聽
> examples_2E_mandelbrot_2F_calc_2D_mandelbrot_2D_ptx .func聽 (.reg .b64
> func_retval0) examples_...
2007 Sep 04
0
[LLVMdev] How to put a pass for last?
...6, %o6
sethi 0, %l0
The nop right before sethi is one instruction I'm not being able to reach in
my pass.
But there is more:
add %l0, 1, %l0
st %l0, [%i6+-12]
.BB1_2: ! bb8
ld [%i6+-12], %l0
subcc %l0, 1000, %l0
bl .BB1_1 ! bb
nop
.BB1_3: ! bb12
ba .BB1_5 ! bb19
nop
or %g0, 1, %l0
Here both the "ba" and the "nop", that are the 3rd and 2nd last operations
of this snipet, are not reachable.
Could I express myself good enougth?
Is it possible to do what I want?
Do you know what might...
2010 Jan 28
2
[LLVMdev] llc generated machine assembly code for NASM
...; %while
; Loop Depth 1
; Loop Header
; Inner Loop
cmp DWORD PTR [_gv], 0
je $BB1_7
$BB1_3: ; %whilebody
; Loop Depth 1
; Loop Header is
BB1_2
; Inner Loop
m...