search for: bb1_2

In my ongoing work on refactoring the asmprinters, I've found that PIC16 doesn't put ':' after labels in some cases. Specifically, it looks like basic block labels are emitted without a ':': movwf @__floatunsidf.frame. + 2 movlp .BB1_2 goto .BB1_2 .BB1_2 ; %bb7 movlw 0 banksel @__floatunsidf.frame. but that functions and global variables are. Does lack of a colon mean that the label is private to the file? Is a colon on the basic block harmful (IOW, can I just emit bas...

...r wrote: > In my ongoing work on refactoring the asmprinters, I've found that > PIC16 doesn't put ':' after labels in some cases. Specifically, it > looks like basic block labels are emitted without a ':': > > movwf @__floatunsidf.frame. + 2 > movlp .BB1_2 > goto .BB1_2 > .BB1_2 ; %bb7 > movlw 0 > banksel @__floatunsidf.frame. > > but that functions and global variables are. Does lack of a colon > mean that the label is private to the file? Is a colon on the basic >...

...%fl3, %fl2, 0dBFF0000000000000; > > mov.f64 %fl2, 0d0000000000000000; > > mov.f64 %fl5, %fl2; > > mov.f64 %fl4, %fl2; > > bra.uni BB1_1; > > BB1_2: > > add.f64 %fl2, %fl2, 0d3FF0000000000000; > > sub.f64 %fl6, %fl6, %fl7; > > add.f64 %fl6, %fl6, %fl1; > > add.f64 %fl5, %fl5, %fl5; > >...

...000000; > > > mov.f64                                %fl2, 0d0000000000000000; > > > mov.f64                                %fl5, %fl2; > > > mov.f64                                %fl4, %fl2; > > > bra.uni                                BB1_1; > > > BB1_2: > > > add.f64                                %fl2, %fl2, 0d3FF0000000000000; > > > sub.f64                                %fl6, %fl6, %fl7; > > > add.f64                                %fl6, %fl6, %fl1; > > > add.f64                                %fl5, %fl5...

...sub ESP, 8 $label1: mov EAX, DWORD PTR [ESP + 12] mov DWORD PTR [ESP], EAX mov DWORD PTR [ESP + 4], 0 mov EAX, DWORD PTR [ESP] mov DWORD PTR [_gv], EAX cmp DWORD PTR [ESP], 6 jb $BB1_4 $BB1_1: ; %then mov DWORD PTR [ESP + 4], 0 ALIGN 16 $BB1_2: ; %while ; Loop Depth 1 ; Loop Header ; Inner Loop cmp DWORD PTR...

...00000000000; >> > mov.f64 %fl2, 0d0000000000000000; >> > mov.f64 %fl5, %fl2; >> > mov.f64 %fl4, %fl2; >> > bra.uni BB1_1; >> > BB1_2: >> > add.f64 %fl2, %fl2, 0d3FF0000000000000; >> > sub.f64 %fl6, %fl6, %fl7; >> > add.f64 %fl6, %fl6, %fl1; >> > add.f64 %fl5, %fl5, %f...

...; > mov.f64 %fl2, 0d0000000000000000; > >> > mov.f64 %fl5, %fl2; > >> > mov.f64 %fl4, %fl2; > >> > bra.uni BB1_1; > >> > BB1_2: > >> > add.f64 %fl2, %fl2, > 0d3FF0000000000000; > >> > sub.f64 %fl6, %fl6, %fl7; > >> > add.f64 %fl6, %fl6, %fl1; > >> > add.f64...

...zapnot $16,15,$2 bis $31,$31,$0 cmpeq $2,$1,$1 cmoveq $1,1,$0 ret $31,($26),1 ---------------------------------------- Now it compiles to ---------------------------------- zapnot $17,15,$0 zapnot $16,15,$1 cmpeq $1,$0,$0 beq $0,$BB1_2 #return $BB1_1: #cond_true bis $31,$31,$0 ret $31,($26),1 $BB1_2: #return lda $0,1($31) ret $31,($26),1 ---------------------------------- I have added createCFGSimplificationPass in ARMTargetMachine::addInstSelector to fix this problem. Is this the correct soluti...

Hi, Chris > That is target independent code, so you should not put sparc specific changes there.  It sounds like one of the sparc-specific target hooks is wrong. Since sparc does not provide any hooks for operation of branches (e.g. AnalyzeBranch and friends) it might be possible that generic codegen code is broken in absence of these hooks. -- With best regards, Anton Korobeynikov Faculty

...ram_4; div.rn.f64 %fl2, %fl2, %fl3; add.f64 %fl2, %fl2, %fl2; add.f64 %fl3, %fl2, 0dBFF0000000000000; mov.f64 %fl2, 0d0000000000000000; mov.f64 %fl5, %fl2; mov.f64 %fl4, %fl2; bra.uni BB1_1; BB1_2: add.f64 %fl2, %fl2, 0d3FF0000000000000; sub.f64 %fl6, %fl6, %fl7; add.f64 %fl6, %fl6, %fl1; add.f64 %fl5, %fl5, %fl5; mul.f64 %fl4, %fl5, %fl4; add.f64 %fl4, %fl4, %fl3; mov.f64 %fl5, %f...

...add.f64聽 聽 聽 聽 聽 聽 聽 聽 %fl3, %fl2, 0dBFF0000000000000; >聽 聽 聽 聽 聽 聽 聽 聽 mov.f64聽 聽 聽 聽 聽 聽 聽 聽 %fl2, 0d0000000000000000; >聽 聽 聽 聽 聽 聽 聽 聽 mov.f64聽 聽 聽 聽 聽 聽 聽 聽 %fl5, %fl2; >聽 聽 聽 聽 聽 聽 聽 聽 mov.f64聽 聽 聽 聽 聽 聽 聽 聽 %fl4, %fl2; >聽 聽 聽 聽 聽 聽 聽 聽 bra.uni聽 聽 聽 聽 聽 聽 聽 聽 BB1_1; > BB1_2: >聽 聽 聽 聽 聽 聽 聽 聽 add.f64聽 聽 聽 聽 聽 聽 聽 聽 %fl2, %fl2, 0d3FF0000000000000; >聽 聽 聽 聽 聽 聽 聽 聽 sub.f64聽 聽 聽 聽 聽 聽 聽 聽 %fl6, %fl6, %fl7; >聽 聽 聽 聽 聽 聽 聽 聽 add.f64聽 聽 聽 聽 聽 聽 聽 聽 %fl6, %fl6, %fl1; >聽 聽 聽 聽 聽 聽 聽 聽 add.f64聽 聽 聽 聽 聽 聽 聽 聽 %fl5, %fl5, %fl5; >聽 聽 聽 聽 聽 聽 聽 聽 mul.f64聽 聽...

...tly able to emit jump tables, but I cannot use then because I cant figure out how to add its address to the constant pool. For example, if I have the jump table ------------------------------------- .JTI1_0: .word .BB1_6 .word .BB1_7 .word .BB1_1 .word .BB1_2 ------------------------------------- the address ".JTI1_0" must be in a constant pool: --------------------------------- .xyz .word .JTI1_0 .... ldr r1, .xyz add r0, r0, r1 ldr r0, [r0] bx r0 --------------------------------- I intended to do something similar to LowerGlobalAddres...

...pe main, #function main: nop sethi 4194296, %g1 or %g1, 56, %g1 save %g1, %o6, %o6 sethi 0, %l0 The nop right before sethi is one instruction I'm not being able to reach in my pass. But there is more: add %l0, 1, %l0 st %l0, [%i6+-12] .BB1_2: ! bb8 ld [%i6+-12], %l0 subcc %l0, 1000, %l0 bl .BB1_1 ! bb nop .BB1_3: ! bb12 ba .BB1_5 ! bb19 nop or %g0, 1, %l0 Here both the "ba" and the "nop", that are the 3rd and 2nd last operations of this snipet, are...

...gt;; dbg:expr.c:757 BCOND <BB#5>, 1, %ICC<imp-use>; dbg:expr.c:757 Successors according to CFG: BB#5 BB#4 is compiled down to ! BB#7: ! %bb ! in Loop: Header=BB1_2 Depth=2 sethi 1856, %l5 or %g0, 1, %l6 sll %l6, %l3, %l3 or %l5, 1, %l5 and %l3, %l5, %l3 subcc %l3, 0, %l3 bne .LBB1_8 nop ba .LBB1_68 nop ! BB#8: ! %bb1...