Displaying 2 results from an estimated 2 matches for "basic_sse2_fp_binop_rm".
Did you mean:
basic_sse1_fp_binop_rm
2009 Jun 17
0
[LLVMdev] help with tablegen
...icate_unindexedload>><<P:Predicate_load>><<P:Predicate_memop>>))
/home/nicholas/llvm-commit/Debug/bin/tblgen: error:
Included from X86.td:128:
Included from X86InstrInfo.td:3964:
Parsing X86InstrSSE.td:1320: In ADDPDrm: Could not infer all types in
pattern!
defm ADD : basic_sse2_fp_binop_rm<0x58, "add", fadd,
int_x86_sse2_add_sd, 1>;
^
I'm hoping someone with backend experience understands why this would
happen. I've looked over the definition of basic_sse2_fp_binop_rm and
can't see any way in which adding MVT::isMetadata should impact it or
the...
2009 Apr 30
6
[LLVMdev] RFC: AVX Pattern Specification [LONG]
...except that ModRM formats, types and
register classes change. For patterns that access memory there are special
"memory access operators" like memopv4f32. But the base pattern of dest =
src1 op src2 is the same.
Worse yet:
let Constraints = "$src1 = $dst" in {
multiclass basic_sse2_fp_binop_rm<bits<8> opc, string OpcodeStr,
SDNode OpNode, Intrinsic F64Int,
bit Commutable = 0> {
// Scalar operation, reg+reg.
def SDrr : SDI<opc, MRMSrcReg, (outs FR64:$dst),
(ins FR64:$sr...