Displaying 3 results from an estimated 3 matches for "basevl".
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basel
2009 Jun 15
0
[LLVMdev] Regular Expressions
On Jun 15, 2009, at 11:33 AM, David Greene wrote:
> To reduce redundancy, developers must be able to write generic
> patterns
> like this:
>
> [(set DSTREGCLASS:$dst, // rr, rrr
> (xor (INTSRCTYPE (bitconvert (SRCTYPE SRCREGCLASS:$src1))),
> (INTSRCTYPE (bitconvert (SRCTYPE SRCREGCLASS:$src2)))))],
>
> The substitution then fills in the appropriate types,
2009 Jun 15
2
[LLVMdev] Regular Expressions
Chris Lattner wrote:
> However, I don't see any reason to base this off of strings. Instead
> of passing down "f32" as a string, why not do something like this
> pseudo code:
>
> class X86ValueType {
> RegisterClass RegClass;
> ...
> }
>
> def X86_f32 : X86ValueType {
> let RegClass = FR32;
> ... };
> def X86_i32 :
2009 Jun 17
3
[LLVMdev] Regular Expressions
...uot;, "f32", 4>;
Now 4 is not the right vector length for VEX.L-encoded AVX, so we'll have to
munge it:
multiclass sse41_avx_fp_binary_vector_osta_vintrinsic_rmi_rrmi<
bits<8> opc,
PatFrag ImmClass,
string OpcodeString,
string Intrinsic,
string BaseType,
int BaseVL,
list<list<dag>> ipatterns = [],
string asm = ""
> {
[...]
def V#NAME#_256rrr_Int : fp_binary_vector_irrr<
opc,
// Not even sure this field reference will work
!strconcat(OpcodeStr,
!cast<X86ValueType>(!strconcat(...