search for: baseregno

Displaying 4 results from an estimated 4 matches for "baseregno".

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2013 Dec 12
3
[LLVMdev] [RFC PATCH 1/2] x86: Fix ModR/M byte output in 16-bit addressing mode
.../lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index 7952607..12a30cf 100644 --- a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -402,6 +402,56 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op, unsigned BaseRegNo = BaseReg ? GetX86RegNum(Base) : -1U; + // 16-bit addressing forms of the ModR/M byte have a different encoding for + // the R/M field and are far more limited in which registers can be used. + if (Is16BitMemOperand(MI, Op)) { + if (BaseReg) { + // See Table 2-1 "16-Bit Addressing...
2013 Dec 16
0
[LLVMdev] [RFC PATCH 1/2] x86: Fix ModR/M byte output in 16-bit addressing mode
...CCodeEmitter.cpp > index 7952607..12a30cf 100644 > --- a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp > +++ b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp > @@ -402,6 +402,56 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst > &MI, unsigned Op, > > unsigned BaseRegNo = BaseReg ? GetX86RegNum(Base) : -1U; > > + // 16-bit addressing forms of the ModR/M byte have a different encoding > for > + // the R/M field and are far more limited in which registers can be > used. > + if (Is16BitMemOperand(MI, Op)) { > + if (BaseReg) { > + //...
2008 Apr 16
0
[LLVMdev] Being able to know the jitted code-size before emitting
...0 || X86RegisterInfo::getX86RegNum(BaseReg) != > N86::ESP)) { > + if (BaseReg == 0) { // Just a displacement? > + // Emit special case [disp32] encoding > + ++FinalSize; > + FinalSize += sizeDisplacementField(DispForReloc); > + } else { > + unsigned BaseRegNo = X86RegisterInfo::getX86RegNum(BaseReg); > + if (!DispForReloc && DispVal == 0 && BaseRegNo != N86::EBP) { > + // Emit simple indirect register encoding... [EAX] f.e. > + ++FinalSize; > + // Be pessimistic and assume it's a disp32, not a disp...
2008 Apr 15
4
[LLVMdev] Being able to know the jitted code-size before emitting
OK, here's a new patch that adds the infrastructure and the implementation for X86, ARM and PPC of GetInstSize and GetFunctionSize. Both functions are virtual functions defined in TargetInstrInfo.h. For X86, I moved some commodity functions from X86CodeEmitter to X86InstrInfo. What do you think? Nicolas Evan Cheng wrote: > > I think both of these belong to TargetInstrInfo. And