search for: base2

Displaying 20 results from an estimated 56 matches for "base2".

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2008 Mar 20
0
[RFC/PATCH 08/15] kvm-s390: intercepts for privileged instructions
...nux/kvm.h> +#include <linux/errno.h> +#include <asm/current.h> +#include <asm/debug.h> +#include <asm/ebcdic.h> +#include <asm/sysinfo.h> +#include "gaccess.h" +#include "kvm-s390.h" + +static int handle_set_prefix(struct kvm_vcpu *vcpu) +{ + int base2 = vcpu->arch.sie_block->ipb >> 28; + int disp2 = ((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16); + u64 operand2; + u32 address = 0; + u8 tmp; + + vcpu->stat.instruction_spx++; + + operand2 = disp2; + if (base2) + operand2 += vcpu->arch.guest_gprs[base2]; + + /*...
2005 Aug 26
3
[LLVMdev] Mapping of class derivated and interfaces
..., if it's so the example you gave me worked becouse the first element of "derived" is the "base" portion, thus having the same pointer. But what if it was not the first? For example with multiple derivation only one class can be in the first position: %base1 = type { int } %base2 = type { sbyte } %derived = type { %base1, %base2, long } void myProc(base2 obj) { } Now if you use get elementptr to obtain "base2" member of "derived" to pass it to myProc, then you're basically passing a different pointer, breaking instance identity among other things:...
2007 Aug 24
11
Aliases not working in a subclass ?
Hi folks, I''m overriding some resource attribute in a subclass. It seems that specifying a resource by its alias doesn''t work in a subclass. Looks like a bug, no ? === module-classes.pp === class module::base { file {"/tmp/test-module": alias => test-module, content => "module::base", } } class
2005 Aug 26
0
[LLVMdev] Mapping of class derivated and interfaces
...ou gave me worked becouse the first > element of "derived" is the "base" portion, thus having the same > pointer. But what if it was not the first? For example with multiple > derivation only one class can be in the first position: > > %base1 = type { int } > %base2 = type { sbyte } > %derived = type { %base1, %base2, long } This will not work with multiple inheritance but I assume we are talking about Java, right? > void myProc(base2 obj) > { > } > > Now if you use get elementptr to obtain "base2" member of "derived" t...
2015 Feb 22
2
[LLVMdev] Eliminating redundant loads
...entptr inbounds %ravi.TValue* %11, i32 1 %13 = getelementptr inbounds %ravi.TValue* %5, i32 1 %14 = bitcast %ravi.TValue* %12 to i8* %15 = bitcast %ravi.TValue* %13 to i8* call void @llvm.memcpy.p0i8.p0i8.i32(i8* %14, i8* %15, i32 16, i32 8, i1 false ) %16 = load %ravi.CallInfo** %L_ci %base2 = getelementptr inbounds %ravi.CallInfo* %16, i32 0, i32 4, i32 0 %17 = load %ravi.TValue** %base2 Now base, base2 and base1 are really the same - i.e., nothing's happened to change the pointer held at this location. So should I expect the redundant getelementptr and load instructions to be...
2008 Sep 25
6
Conversion to Binary (base2)
Hello, Is there a simple way to take an input, and convert the decimal integers to binary? In this case, I have a CSV file, and I need to convert the first column of every line to binary. Thanks. -- Jason Thibodeau [[alternative HTML version deleted]]
2007 Apr 18
3
[PATCH 12/21] i386 Deprecate descriptor asm
...quot;=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type)) +struct desc_internal_struct { + unsigned short limit0; + unsigned short base0; + unsigned char base1; + unsigned char type; + unsigned int limit1 : 4; + unsigned int flags : 4; + unsigned char base2; +} __attribute__((packed)); + +static inline struct desc_internal_struct *desc_internal(struct desc_struct *d) +{ + return (struct desc_internal_struct *)d; +} + +static inline unsigned long get_desc_base(struct desc_struct *desc) +{ + unsigned long base; + struct desc_internal_struct *dint = desc...
2007 Apr 18
3
[PATCH 12/21] i386 Deprecate descriptor asm
...quot;=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type)) +struct desc_internal_struct { + unsigned short limit0; + unsigned short base0; + unsigned char base1; + unsigned char type; + unsigned int limit1 : 4; + unsigned int flags : 4; + unsigned char base2; +} __attribute__((packed)); + +static inline struct desc_internal_struct *desc_internal(struct desc_struct *d) +{ + return (struct desc_internal_struct *)d; +} + +static inline unsigned long get_desc_base(struct desc_struct *desc) +{ + unsigned long base; + struct desc_internal_struct *dint = desc...
2005 Aug 26
0
[LLVMdev] Mapping of class derivated and interfaces
> Hi! i'm tring to figure out how classes and dependencies > can be mapped to llvm. > [snip] > how do i encode a function that takes "base" type > so that it also takes "derived" ? You'll notice that your function doesn't take an object of type base, but a pointer to it. This is important - in a language such as LLVM where actual structures can be
2007 Dec 13
2
[PATCH] avoid ifdefs in desc.h, getting rid of pack_ldt and pack_tss
...*d, - unsigned long tss, unsigned type, - unsigned size) -{ - memset(d, 0, sizeof(*d)); - d->limit0 = size & 0xFFFF; - d->base0 = PTR_LOW(tss); - d->base1 = PTR_MIDDLE(tss) & 0xFF; - d->type = type; - d->p = 1; - d->limit1 = (size >> 16) & 0xF; - d->base2 = (PTR_MIDDLE(tss) >> 8) & 0xFF; - d->base3 = PTR_HIGH(tss); -} - static inline void pack_descriptor(struct desc_struct *desc, unsigned long base, unsigned long limit, unsigned char type, unsigned char flags) @@ -151,30 +136,24 @@ static inline void pack_descriptor(str...
2007 Dec 13
2
[PATCH] avoid ifdefs in desc.h, getting rid of pack_ldt and pack_tss
...*d, - unsigned long tss, unsigned type, - unsigned size) -{ - memset(d, 0, sizeof(*d)); - d->limit0 = size & 0xFFFF; - d->base0 = PTR_LOW(tss); - d->base1 = PTR_MIDDLE(tss) & 0xFF; - d->type = type; - d->p = 1; - d->limit1 = (size >> 16) & 0xF; - d->base2 = (PTR_MIDDLE(tss) >> 8) & 0xFF; - d->base3 = PTR_HIGH(tss); -} - static inline void pack_descriptor(struct desc_struct *desc, unsigned long base, unsigned long limit, unsigned char type, unsigned char flags) @@ -151,30 +136,24 @@ static inline void pack_descriptor(str...
2005 Aug 25
5
[LLVMdev] Mapping of class derivated and interfaces
Hi! i'm tring to figure out how classes and dependencies can be mapped to llvm. I've read on docs that nesting can be used: class base { int Y; }; class derived : base { short Z; }; becomes: %base = type { int } %derived = type { %base, short } That's ok, but now the question is: how do i encode a function that takes "base" type so that it also takes "derived"
2011 Aug 10
2
Loops for repetitive task
...#39;i' so that the script can be applied in a general sense. ################################Code############################### chr2.data<-read.table(file="chr2.out.txt", header=F) colnames(chr2.data)<-c("chr","start","end","base1","base2","totalreads","methylation","strand") splc2<-split(chr2.data, paste(chr2.data$chr)) chr2.df<-as.data.frame(t(sapply(splc2, function(x) list(TR=NROW(x[['totalreads']]), RG1=sum(x[['totalreads']]>=1), percent=(NROW(x[['totalreads'...
2008 Mar 20
0
[RFC/PATCH 07/15] kvm-s390: interrupt subsystem, cpu timer, waitpsw
...+18,91 @@ #include <asm/kvm_host.h> #include "kvm-s390.h" +#include "gaccess.h" + +static int handle_lctg(struct kvm_vcpu *vcpu) +{ + int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; + int reg3 = vcpu->arch.sie_block->ipa & 0x000f; + int base2 = vcpu->arch.sie_block->ipb >> 28; + int disp2 = ((vcpu->arch.sie_block->ipb & 0x0fff0000) >> 16) + + ((vcpu->arch.sie_block->ipb & 0xff00) << 4); + u64 useraddr; + int reg, rc; + + vcpu->stat.instruction_lctg++; + if ((vcpu->arch.sie_block->ip...
2002 Aug 28
0
base conversion, digit interweaving
...interweaving (as in x=135, y=246, interwoven=123456) which are ok for a small number of conversions or weaves, but, to be able to handle a large number of conversions or weaves, I'm hoping that some faster code already exists (ideally calling C or FORTRAN). Any suggestions for going base10 to base2, base2 to base4, or digit interweaving would be appreciated. regards, Richard Remington -.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.- r-help mailing list -- Read http://www.ci.tuwien.ac.at/~hornik/R/R-FAQ.html Send "info", "help", or "[un...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 07/17] paravirt_ops - descriptor changes.
...truct *)cpu_gdt_descr[_cpu].address) static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsigned dpl, unsigned ist) { @@ -115,7 +112,35 @@ static inline void set_seg_base(unsigned d->base0 = addr & 0xffff; d->base1 = (addr >> 16) & 0xff; d->base2 = (addr >> 24) & 0xff; -} +} + +static inline void native_load_tr_desc(void) +{ + asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8)); +} + +static inline void native_load_gdt(const struct desc_ptr *dtr) +{ + asm volatile("lgdt %w0"::"m" (*dtr)); +} + +...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 07/17] paravirt_ops - descriptor changes.
...truct *)cpu_gdt_descr[_cpu].address) static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsigned dpl, unsigned ist) { @@ -115,7 +112,35 @@ static inline void set_seg_base(unsigned d->base0 = addr & 0xffff; d->base1 = (addr >> 16) & 0xff; d->base2 = (addr >> 24) & 0xff; -} +} + +static inline void native_load_tr_desc(void) +{ + asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8)); +} + +static inline void native_load_gdt(const struct desc_ptr *dtr) +{ + asm volatile("lgdt %w0"::"m" (*dtr)); +} + +...
2010 Dec 17
1
Help for loop
Hello all, Is there any way to get each file from a website list and aggregate in a data frame? Otherwise I have to type 23 thousand web address into a long script like it: base1 <- read.table("site 1", sep=";", header=T, fileEncoding="windows-1252") base2 <- read.table("site 2", sep=";", header=T, fileEncoding="windows-1252") I need to download each .CSV file from each address in the list vector and row bind all them into a big data frame. Also I need to decode each object to UTF-8. Of course, many of web sites fro...
2008 Mar 20
34
[RFC/PATCH 00/15] kvm on big iron
This patch series introduces a backend for kvm to run on IBM System z machines that uses the mainframe's sie virtualization capability. This work runs 64bit guests on z800/z890/z900/z990/z9/z10 class machines with a 64bit linux host. Userspace will follow once we're done brushing it over. The patch queue consists of the following patches, which can be applied in sequence on top of kvm.git
2008 Mar 20
34
[RFC/PATCH 00/15] kvm on big iron
This patch series introduces a backend for kvm to run on IBM System z machines that uses the mainframe's sie virtualization capability. This work runs 64bit guests on z800/z890/z900/z990/z9/z10 class machines with a 64bit linux host. Userspace will follow once we're done brushing it over. The patch queue consists of the following patches, which can be applied in sequence on top of kvm.git