search for: base0

Displaying 15 results from an estimated 15 matches for "base0".

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2013 Jun 07
1
[LLVMdev] tablegen foreach question
...t;) D3 = (3, "D") I tried to use list of strings and the foreach construct, but apparently tablegen doesn't allow using identifiers to access array elements. $ cat tbl3.td def StrList { list<string> ls = ["A", "B", "C", "D"]; } class Base0<int i> { int I = i; } class Base1<string s> { string S1 = s; } foreach i = 0-3 in def D#i: Base0<i>, Base1<StrList.ls[i]>; $ llvm-tblgen tbl3.td tbl3.td:15:37: error: expected integer or bitrange def D#i: Base0<i>, Base1<StrList.ls[i]>; -------------- next...
2016 May 12
0
Need help for block committing
Hi all. Can snapshots of identical images being blocked committed to the base images that are not the original ones? For example, suppose I have base0 and made a snapshot of it called SN0, then I copy base0 as base0', can SN0 be block committed into base0'? I think it's possible in theory but the block commit command just takes vm, base, and top as parameters, since the snapshot file is taken from another image I don't think I ca...
2007 Apr 18
3
[PATCH 12/21] i386 Deprecate descriptor asm
...,5(%2)\n\t" \ - "movb $0,6(%2)\n\t" \ - "movb %h1,7(%2)\n\t" \ - "rorl $16,%1" \ - : "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type)) +struct desc_internal_struct { + unsigned short limit0; + unsigned short base0; + unsigned char base1; + unsigned char type; + unsigned int limit1 : 4; + unsigned int flags : 4; + unsigned char base2; +} __attribute__((packed)); + +static inline struct desc_internal_struct *desc_internal(struct desc_struct *d) +{ + return (struct desc_internal_struct *)d; +} + +static inline...
2007 Apr 18
3
[PATCH 12/21] i386 Deprecate descriptor asm
...,5(%2)\n\t" \ - "movb $0,6(%2)\n\t" \ - "movb %h1,7(%2)\n\t" \ - "rorl $16,%1" \ - : "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type)) +struct desc_internal_struct { + unsigned short limit0; + unsigned short base0; + unsigned char base1; + unsigned char type; + unsigned int limit1 : 4; + unsigned int flags : 4; + unsigned char base2; +} __attribute__((packed)); + +static inline struct desc_internal_struct *desc_internal(struct desc_struct *d) +{ + return (struct desc_internal_struct *)d; +} + +static inline...
2007 Dec 13
2
[PATCH] avoid ifdefs in desc.h, getting rid of pack_ldt and pack_tss
...rite_gdt_entry(struct desc_struct *gdt, int entry, memcpy(&gdt[entry], desc, size); } -static inline void set_tssldt_descriptor(struct ldttss_desc64 *d, - unsigned long tss, unsigned type, - unsigned size) -{ - memset(d, 0, sizeof(*d)); - d->limit0 = size & 0xFFFF; - d->base0 = PTR_LOW(tss); - d->base1 = PTR_MIDDLE(tss) & 0xFF; - d->type = type; - d->p = 1; - d->limit1 = (size >> 16) & 0xF; - d->base2 = (PTR_MIDDLE(tss) >> 8) & 0xFF; - d->base3 = PTR_HIGH(tss); -} - static inline void pack_descriptor(struct desc_struct *desc, u...
2007 Dec 13
2
[PATCH] avoid ifdefs in desc.h, getting rid of pack_ldt and pack_tss
...rite_gdt_entry(struct desc_struct *gdt, int entry, memcpy(&gdt[entry], desc, size); } -static inline void set_tssldt_descriptor(struct ldttss_desc64 *d, - unsigned long tss, unsigned type, - unsigned size) -{ - memset(d, 0, sizeof(*d)); - d->limit0 = size & 0xFFFF; - d->base0 = PTR_LOW(tss); - d->base1 = PTR_MIDDLE(tss) & 0xFF; - d->type = type; - d->p = 1; - d->limit1 = (size >> 16) & 0xF; - d->base2 = (PTR_MIDDLE(tss) >> 8) & 0xFF; - d->base3 = PTR_HIGH(tss); -} - static inline void pack_descriptor(struct desc_struct *desc, u...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 07/17] paravirt_ops - descriptor changes.
..._gdt_descr[]; -/* the cpu gdt accessor */ -#define cpu_gdt(_cpu) ((struct desc_struct *)cpu_gdt_descr[_cpu].address) static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsigned dpl, unsigned ist) { @@ -115,7 +112,35 @@ static inline void set_seg_base(unsigned d->base0 = addr & 0xffff; d->base1 = (addr >> 16) & 0xff; d->base2 = (addr >> 24) & 0xff; -} +} + +static inline void native_load_tr_desc(void) +{ + asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8)); +} + +static inline void native_load_gdt(const struct de...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 07/17] paravirt_ops - descriptor changes.
..._gdt_descr[]; -/* the cpu gdt accessor */ -#define cpu_gdt(_cpu) ((struct desc_struct *)cpu_gdt_descr[_cpu].address) static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsigned dpl, unsigned ist) { @@ -115,7 +112,35 @@ static inline void set_seg_base(unsigned d->base0 = addr & 0xffff; d->base1 = (addr >> 16) & 0xff; d->base2 = (addr >> 24) & 0xff; -} +} + +static inline void native_load_tr_desc(void) +{ + asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8)); +} + +static inline void native_load_gdt(const struct de...
2011 Jan 09
1
how to recreate eth0 - Realtek 8169sc
...wer Management version 2 scanpci -v pci bus 0x0001 cardnum 0x01 function 0x00: vendor 0x1186 device 0x4300 D-Link System Inc DGE-528T Gigabit Ethernet Adapter STATUS 0x02b0 COMMAND 0x0017 CLASS 0x02 0x00 0x00 REVISION 0x10 BIST 0x00 HEADER 0x00 LATENCY 0x40 CACHE 0x08 BASE0 0x0000a001 addr 0x0000a000 I/O BASE1 0xe1000000 addr 0xe1000000 MEM MAX_LAT 0x40 MIN_GNT 0x20 INT_PIN 0x01 INT_LINE 0x0b pci bus 0x0001 cardnum 0x05 function 0x00: vendor 0x10ec device 0x8167 Realtek Semiconductor Co., Ltd. Device unknown CardVendor 0x1458 card 0xe000 (Card...
2007 Dec 06
51
[PATCH 0/19] desc_struct integration
Hi, this is a series of patches that unify the struct desc_struct and friends across x86_64 and i386. As usual, it provides paravirt capabilities as a side-effect for x86_64. I consider the main goal, namely, of unifying the desc_struct, an ongoing effort, being this the beginning. A lot of old code has to be touched to accomplish that. I don't consider this patch ready for inclusion.
2007 Dec 06
51
[PATCH 0/19] desc_struct integration
Hi, this is a series of patches that unify the struct desc_struct and friends across x86_64 and i386. As usual, it provides paravirt capabilities as a side-effect for x86_64. I consider the main goal, namely, of unifying the desc_struct, an ongoing effort, being this the beginning. A lot of old code has to be touched to accomplish that. I don't consider this patch ready for inclusion.
2007 Apr 18
1
[RFC/PATCH LGUEST X86_64 03/13] lguest64 core
...guest_vcpu_order); + lguest_unmap_guest_pages(linfo, hv_vcpu, lguest_vcpu_pages); + hvvm_unmap_pages(hv_vcpu, lguest_vcpu_pages); + lguest_free_guest_pages(linfo); +} + +#if 0 +static void print_tss(struct ldttss_desc *tss) +{ + u64 base; + u64 limit; + int i; + u16 iobp = 0x64; + + base = (tss->base0) + ((u64)tss->base1 << 16) + + ((u64)tss->base2 << 24) + ((u64)tss->base3 << 32); + limit = (tss->limit0) + ((u64)tss->limit1 << 16); + if (tss->g) + limit <<= 12; + printk(" base: %016llx\n", base); + printk(" limit: %llx\n&quot...
2007 Apr 18
1
[RFC/PATCH LGUEST X86_64 03/13] lguest64 core
...guest_vcpu_order); + lguest_unmap_guest_pages(linfo, hv_vcpu, lguest_vcpu_pages); + hvvm_unmap_pages(hv_vcpu, lguest_vcpu_pages); + lguest_free_guest_pages(linfo); +} + +#if 0 +static void print_tss(struct ldttss_desc *tss) +{ + u64 base; + u64 limit; + int i; + u16 iobp = 0x64; + + base = (tss->base0) + ((u64)tss->base1 << 16) + + ((u64)tss->base2 << 24) + ((u64)tss->base3 << 32); + limit = (tss->limit0) + ((u64)tss->limit1 << 16); + if (tss->g) + limit <<= 12; + printk(" base: %016llx\n", base); + printk(" limit: %llx\n&quot...
2007 Apr 18
2
[PATCH] x86_64 paravirt_ops port
..._gdt_descr[]; -/* the cpu gdt accessor */ -#define cpu_gdt(_cpu) ((struct desc_struct *)cpu_gdt_descr[_cpu].address) static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsigned dpl, unsigned ist) { @@ -115,7 +112,19 @@ static inline void set_seg_base(unsigned d->base0 = addr & 0xffff; d->base1 = (addr >> 16) & 0xff; d->base2 = (addr >> 24) & 0xff; -} +} + +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else + +#define load_TR_desc() asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8)) +#define set_ldt n...
2007 Apr 18
2
[PATCH] x86_64 paravirt_ops port
..._gdt_descr[]; -/* the cpu gdt accessor */ -#define cpu_gdt(_cpu) ((struct desc_struct *)cpu_gdt_descr[_cpu].address) static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsigned dpl, unsigned ist) { @@ -115,7 +112,19 @@ static inline void set_seg_base(unsigned d->base0 = addr & 0xffff; d->base1 = (addr >> 16) & 0xff; d->base2 = (addr >> 24) & 0xff; -} +} + +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else + +#define load_TR_desc() asm volatile("ltr %w0"::"r" (GDT_ENTRY_TSS*8)) +#define set_ldt n...