Displaying 5 results from an estimated 5 matches for "barebox".
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backbox
2014 Dec 24
3
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...+ tegra_pmc_writel(assert ? 1 : 0, GPU_RG_CNTRL);
> + tegra_pmc_readl(GPU_RG_CNTRL);
You are reading the register back here, which to me seems like you are
trying to make sure that the write is flushed. Why is this needed?
I also observed the need to do this while working on Tegra124 PCIe in
Barebox, otherwise the partition wouldn't power up. I didn't have time
to follow up on this yet, so it would be nice if you could explain why
this is needed, or if you don't know ask HW about it.
> + return 0;
> + }
> +
> + return -EINVAL;
> +}
> +EXPORT_SYMBOL(tegra_powerga...
2014 Dec 25
2
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...L);
> >> + tegra_pmc_readl(GPU_RG_CNTRL);
> > You are reading the register back here, which to me seems like you are
> > trying to make sure that the write is flushed. Why is this needed?
> > I also observed the need to do this while working on Tegra124 PCIe in
> > Barebox, otherwise the partition wouldn't power up. I didn't have time
> > to follow up on this yet, so it would be nice if you could explain why
> > this is needed, or if you don't know ask HW about it.
> That's a read fence to assure the post of the previous writes through...
2014 Dec 25
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...sert ? 1 : 0, GPU_RG_CNTRL);
>> + tegra_pmc_readl(GPU_RG_CNTRL);
> You are reading the register back here, which to me seems like you are
> trying to make sure that the write is flushed. Why is this needed?
> I also observed the need to do this while working on Tegra124 PCIe in
> Barebox, otherwise the partition wouldn't power up. I didn't have time
> to follow up on this yet, so it would be nice if you could explain why
> this is needed, or if you don't know ask HW about it.
That's a read fence to assure the post of the previous writes through
Tegra intercon...
2014 Dec 29
0
[PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp
...;> + tegra_pmc_readl(GPU_RG_CNTRL);
>>> You are reading the register back here, which to me seems like you are
>>> trying to make sure that the write is flushed. Why is this needed?
>>> I also observed the need to do this while working on Tegra124 PCIe in
>>> Barebox, otherwise the partition wouldn't power up. I didn't have time
>>> to follow up on this yet, so it would be nice if you could explain why
>>> this is needed, or if you don't know ask HW about it.
>> That's a read fence to assure the post of the previous write...
2014 Dec 23
18
[PATCH 0/11] Add suspend/resume support for GK20A
Hi,
This series includes some pieces of fixes to complete the GK20A power
on/off sequences and add the suspend/resume support.
The patches 1/11 - 4/11 are based on the linux-next-20141219.
The patches 5/11 - 11/11 are based on the branch "linux-3.19" of Ben Skeggs's
tree (http://cgit.freedesktop.org/~darktama/nouveau).
Thanks,
Vince
Vince Hsu (4): (linux-next-20141219)
ARM: