search for: bar2

...[0]: $ env -i USER=user HOME=/dev/shm/dovecot-test/user PATH=/usr/bin:/bin \ doveadm -c /tmp/dovecot.conf mailbox create foo2 baz2 $ env -i USER=user HOME=/dev/shm/dovecot-test/user PATH=/usr/bin:/bin \ doveadm -c /tmp/dovecot.conf mailbox create -s \ foo2/{bar1,bar2} baz2/{bar2,bar22,bar222} eps2 eps2/mamba qux2/bar2 $ env -i USER=user HOME=/dev/shm/dovecot-test/user PATH=/usr/bin:/bin \ doveadm -c /tmp/dovecot.conf exec imap S: * PREAUTH [CAPABILITY IMAP4rev1 ? LIST-EXTENDED ?] Logged in as user C: D01 LIST "" "*"...

Hello all, I have,say 4 R objects... bar1, bar2, bar3, bar4.. that I'd like to include in an R package "foobar". The desired functionality would be: > library(foobar) > data(foo) > ls() [1] "bar1" "bar2" "bar3" "bar4" I've tried the following two approaches: 1) I created the...

I''m trying now to do "sudo fixrbconfig" in the terminal, and I get this: /usr/lib/ruby/1.8/powerpc-darwin8.0/ruby.h does not exist. This probably means you haven''t yet installed Xcode from the Tiger DVD. You won''t be able to compile Ruby extensions without it. Please install it then rerun this program. I''m on an intel mac. Am I unable to use

...make the GP10B work more properly on a wider range of Jetson TX2 devices and enable it by default. One thing to mention is that I'm not exactly sure if the first patch is the right thing to do. I haven't seen any issues after that change, but I'm also not exactly sure I understand what BAR2 is used for, so I don't know if I would've even covered those code paths (other than the one causing the crash at probe time) in my tests. It'd be great to get Lyude's feedback on the second patch, since that call to pci_disable_device() was rather oddly placed and I'm not sure...

Dear Mentors, I will be writing test cases for IPRA for lit infrastructure. Following 2 basic test cases I have identified : Program that does not have recursive function call. Program that does have recursive calls. Please suggest some other test cases or provide some hints. Sincerely, Vivek -------------- next part -------------- An HTML attachment was scrubbed... URL:

...space at the end either). In other cases there could be many space separated short hostname aliases. What I have been trying to do without success is add our domain name to the first string after the ip address and tab character. As an example, == Before == 1.1.1.1 foo 10.10.10.10 bar bar2 100.100.100.100 foobar foobar2 foobar3 == After == 1.1.1.1 foo.contoso.com 10.10.10.10 bar.contoso.com bar2 100.100.100.100 foobar.contoso.com foobar2 foobar3 Any advice on how to pull this off? Thanks. -------------- next part -------------- An HTML attachment was scrubbed......

...rders','Attention Deficit', 'Eating Disorders', 'Substance Abuse','Developmental Disorders')) My question is, if there is a chance to force a line break in each label. The result shoud look like this: Bar1 Bar2 Bar3 Bar4 Bar5 Conduct Attention Eating Substance Developmental Disorders Disorders Disorders Abuse Disorders The result could also look like this: Bar1 Bar2 Bar3 Bar4 Bar5 | | |...

...look at: > > https://github.com/aliguori/qemu/commit/587c35c1a3fe90f6af0f97927047ef4d3182a659 > > And: > > https://github.com/aliguori/qemu/commit/01ba80a23cf2eb1e15056f82b44b94ec381565cb > > Which lets virtio-pci be subclassable and then remaps the config space to > BAR2. Interesting. Have the spec anywhere? You are saying this is going to conflict because of BAR2 usage, yes? So let's only do this virtio-fb only for new layout, so we don't need to maintain compatibility. In particular, we are working on making memory BAR access fast for virtio devices in...

From: Thierry Reding <treding at nvidia.com> Fill in BAR2 callbacks for instance memory. There's no BAR2 on Tegra GPUs, but buffers are all in system memory anyway, so just return the plain address. Signed-off-by: Thierry Reding <treding at nvidia.com> --- .../drm/nouveau/nvkm/subdev/instmem/gk20a.c | 30 +++++++++++++++++++ 1 file changed,...

...ula. In S if the formula contains a "- 1", that will cause the contrasts to be suppressed. S> foo <- data.frame(bar = factor(rep(1:3, rep(2,3)))) S> foo bar 1 1 2 1 3 2 4 2 5 3 6 3 S> model.matrix(~bar - 1, model.frame(~ bar - 1, data = foo)) bar1 bar2 bar3 1 1 0 0 2 1 0 0 3 0 1 0 4 0 1 0 5 0 0 1 6 0 0 1 S> model.matrix(~bar - 1, model.frame(~ bar - 1, data = foo), + contr = list(bar = contr.treatment(3))) bar1 bar2 bar3 1 1 0 0 2 1 0 0 3 0 1 0...

...all "Chain"s. I need to have consumeArg(r1) because, I don't want the producer of r1 to be scheduled between FOO and arg(r1). Similarly I need to have consumeArg(r2). However, I am not able to prevent some unrelated operation from getting scheduled between FOO and arg(r1). If BAR1 and BAR2 are unrelated operations, the following is a legal schedule : consumeArg(r1) consumeArg(r2) FOO BAR1 arg(r1) BAR2 arg(r2) This leads to illegal assembly program because the assembler expects FOO r1, r2 to appear together. How can I make the subgraph FOO->arg(r1)->arg(r2) be always scheduled...

The frontend code is a pretty simple for loop, that counts from i = 0; i != 10; i += 1 It gets optimized into and endless loop. export fn entry() void { var array: [10]Bar = undefined; var x = for (array) |elem, i| { if (i == 1) break elem; } else bar2(); } Here's the generated IR: ; ModuleID = 'test' source_filename = "test" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %Bar = type { i32, i32 } %"[]u8" = type { i8*, i64 } %StackTrace =...

Hi all, Sorry if this seems too basic. But is there a way to overwrite the target of a symbolic link without first deleting the symlink itself? For example, if I have this: public_html -> releases/b2b-20080228 ... and there's a new update, I can then just do the following: $ ln releases/site-latest public_html I tried using the -f option but it doesn't seem to work as expected.

...%r9 ; NOIPRA: pushq %r8 ; NOIPRA: callq bar1 ; CHECK: foo: ; CHECK-NOT: pushq %r10 ; CHECK-NOT: pushq %r9 ; CHECK-NOT: pushq %r8 ; CHECK: callq bar1 target triple = "x86_64-unknown-unknown" define void @bar1() { ret void } define preserve_allcc void @foo()#0 { call void @bar1() call void @bar2() ret void } define void @bar2() { ret void } attributes #0 = {nounwind} Is this correct approach to verify spills? Sincerely, Vivek -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160605/c436b6b3/attachmen...

...N=60 k=3 v1=var(g1) v2=var(g2) v3=var(g3) #pooled variance A=((n1-1)*v1+(n2-1)*v2+(n3-1)*v3)/(N-k) #calculate B B=((N-k)*(log(A)))-((n1-1)*log(v1)+(n2-1)*log(v2)+(n3-1)*log(v3)) #calculate C C=1+(1/(3*(k-1))*(((1/(n1-1))+(1/(n2-1))+(1/(n3-1)))-(1/(N-k)))) #calculate layard estimator xbar1=mean(g1) xbar2=mean(g2) xbar3=mean(g3) sum1=sum((g1-xbar1)^4) sum2=sum((g2-xbar2)^4) sum3=sum((g3-xbar3)^4) sum4=sum((g1-xbar1)^2) sum5=sum((g2-xbar2)^2) sum6=sum((g3-xbar3)^2) y= (N*(sum1+sum2+sum3))/((sum4+sum5+sum6)^2) #calculate bartlett modified statistic bar2=B/(C*(1/2)*(y-1)) bar2 pv[i]<-pchisq(bar2,2,l...

Yes, the hairy-edges of undefined behaviour - UB is UB. It does mean that given: __attribute__((noinline)) int foo(int a, int b) { return a + b; } int bar1(int x) { return foo(x, INT_MIN); } int bar2(int x) { return x + INT_MIN; } 'bar1' and 'bar2' have different outcomes. However, I think that the new optimisation is neat and valid and I am not suggesting that it should be changed, but it would be useful if a target could override this if they choose to do so. MartinO ----...

...uot;CHECK-NOT: push" > > > ; CHECK: callq bar1 > > target triple = "x86_64-unknown-unknown" > > define void @bar1() { > > ret void > > } > > define preserve_allcc void @foo()#0 { > > call void @bar1() > > call void @bar2() > > ret void > > } > > define void @bar2() { > > ret void > > } > > attributes #0 = {nounwind} > > > > Is this correct approach to verify spills? > > Yes. > > > -- > Mehdi > > -------------- next part ------------...

...quot;bar", representation(b="numeric")) > setClass("foo2",contains=c("foo") ) > setClass("foo3",contains=c("foo", "VIRTUAL") ) > setClass("foo4",contains=c("foo", "bar") ) > setClass("bar2",contains=c("foo2") ) > setClass("bar3",contains=c("foo3") ) > setClass("bar4",contains=c("foo4") ) > i<-new("foo",a=1) > new("bar2", i) An object of class "bar2" Slot "a": [1] 1 >...

.../github.com/aliguori/qemu/commit/587c35c1a3fe90f6af0f97927047ef4d3182a659 >> >> And: >> >> https://github.com/aliguori/qemu/commit/01ba80a23cf2eb1e15056f82b44b94ec381565cb >> >> Which lets virtio-pci be subclassable and then remaps the config space to >> BAR2. > > > Interesting. Have the spec anywhere? Not yet, but working on that. > You are saying this is going to conflict because > of BAR2 usage, yes? No, this whole thing is flexible. I had to use BAR2 because BAR0 has to be the vram mapping. It also had to be an MMIO bar. The new...

...properly > on a wider range of Jetson TX2 devices and enable it by default. > > One thing to mention is that I'm not exactly sure if the first patch is > the right thing to do. I haven't seen any issues after that change, but > I'm also not exactly sure I understand what BAR2 is used for, so I don't > know if I would've even covered those code paths (other than the one > causing the crash at probe time) in my tests. BAR2 on dGPUs is used to map kernel-level GPU objects in VRAM so they can be accessed by the driver. It's pretty much a smaller version o...