search for: ballaba

Hi Tim, I just read this thread and I see that you mentioned the buildbot and my name. > - LLVM test suite enabled in the buildbot and testing ARM64 (Gabor) What exactly I can do to help you with the merge process? Best regards, Gabor Ballabas -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140415/dcf98767/attachment.html>

On 10.02.2015 13:51, Gabor Ballabas wrote: > Hi Andy, > > I have a question regarding the submission deadline. > We plan to create and bring a poster to the conference about the > LLVM-related work of our University (University of Szeged, Hungary). > Do we have to upload the full poster before the deadline or would...

...p in ARMConstantIslands, like the Thumb jumptable optimizations mentioned in the Bugzilla issue. I hope someone more familiar with this part of the backend can give me some pointers about how to proceed with this idea ( or why it is complete rubbish in the first place :) ) Best regards, Gabor Ballabas Software Developer Department of Software Engineering, University of Szeged, Hungary -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20171107/873e0016/attachment.html>

...org/viewvc/llvm-project?revision=193459&view=revision <http://llvm.org/viewvc/llvm-project?revision=193459&view=revision> caused the issue but I'm still trying to verify that on AArch64. Could you run the tests again after reverting that aforementioned commit? Best regards, Gabor Ballabas On 11/12/13 14:27, I.smail Dönmez wrote: > Hi, > > Testing llvm trunk on openSUSE 13.1 ARMv7 I got 4 unexpected passes: > > Unexpected Passing Tests (4): > LLVM :: ExecutionEngine/MCJIT/cross-module-sm-pic-a.ll > LLVM :: ExecutionEngine/MCJIT/multi-module-sm-pic-a.ll > LLV...

Hi, Testing llvm trunk on openSUSE 13.1 ARMv7 I got 4 unexpected passes: Unexpected Passing Tests (4): LLVM :: ExecutionEngine/MCJIT/cross-module-sm-pic-a.ll LLVM :: ExecutionEngine/MCJIT/multi-module-sm-pic-a.ll LLVM :: ExecutionEngine/MCJIT/remote/cross-module-sm-pic-a.ll LLVM :: ExecutionEngine/MCJIT/remote/multi-module-sm-pic-a.ll And one FAIL: Failing Tests (1): LLVM ::

Hi All, Just a quick reminder that Euro LLVM 2015 will be on April 13th-14th in London at Goldsmiths college. We have now sold over half the tickets and so if you have not done so, register at: http://www.eventbrite.com/e/eurollvm-2015-tickets-15350278095 Also the deadline for submissions is nearly upon us. Deadline: February 16th 2015 https://easychair.org/conferences/?conf=eurollvm2015

Dear LLVM developers, My name is Gabor Ballabas. I work for the University of Szeged (Hungary) and we have an ongoing project with the goal of setting up and maintaining an LLVM buildbot for the ARMv8 - alias Aarch64 - architecture. Due to lack of existing hardware for this architecture we use ARM's Foundation Model to run the Aarch64 binar...

Hi Gabor, It seems the linker is playing tricks on the full bot: http://lab.llvm.org:8011/builders/clang-native-aarch64-full Sometimes it works by cleaning the stage2 dir completely, but there may be some extra bits that we're not considering. However, I can't see why any of the commits on the first failure did anything to the relocations on AArhc64... cheers, --renato

...ul reply. Please find my thoughts below. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation From: Renato Golin [mailto:renato.golin at linaro.org] Sent: Friday, October 25, 2013 1:11 PM To: David Peixotto Cc: LLVM Dev; Logan Chien; Gabor Ballabas; Rafael Espíndola; Richard Barton; Amara Emerson Subject: Re: Add support for ldr pseudo instruction in ARM integrated assembler On 25 October 2013 18:33, David Peixotto <dpeixott at codeaurora.org> wrote: Both armasm and gnu as support an ldr pseudo instruction for loading constants th...

Hi Gabor, I noticed that one particular test fails intermittently on the AArch64 bot: http://lab.llvm.org:8011/builders/clang-native-aarch64-full FAIL: Profile:: instrprof-set-filename-then-reset-default.c Some times on stage1, others on stage2, others no fail at all. All the commits during these builds are not related to profiling or AArch64, so I believe this has something to do with the

...elow. > > -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > > > From: Renato Golin [mailto:renato.golin at linaro.org] > Sent: Friday, October 25, 2013 1:11 PM > To: David Peixotto > Cc: LLVM Dev; Logan Chien; Gabor Ballabas; Rafael Espíndola; Richard Barton; Amara Emerson > Subject: Re: Add support for ldr pseudo instruction in ARM integrated assembler > > On 25 October 2013 18:33, David Peixotto <dpeixott at codeaurora.org> wrote: > Both armasm and gnu as support an ldr pseudo instruction for loa...

...-- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation From: Renato Golin [ <mailto:renato.golin at linaro.org> mailto:renato.golin at linaro.org] Sent: Friday, October 25, 2013 1:11 PM To: David Peixotto Cc: LLVM Dev; Logan Chien; Gabor Ballabas; Rafael Espíndola; Richard Barton; Amara Emerson Subject: Re: Add support for ldr pseudo instruction in ARM integrated assembler On 25 October 2013 18:33, David Peixotto < <mailto:dpeixott at codeaurora.org> dpeixott at codeaurora.org> wrote: Both armasm and gnu as support an ldr...

...elow. > > -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > > > From: Renato Golin [mailto:renato.golin at linaro.org] > Sent: Friday, October 25, 2013 1:11 PM > To: David Peixotto > Cc: LLVM Dev; Logan Chien; Gabor Ballabas; Rafael Espíndola; Richard Barton; Amara Emerson > Subject: Re: Add support for ldr pseudo instruction in ARM integrated assembler > > On 25 October 2013 18:33, David Peixotto <dpeixott at codeaurora.org> wrote: > Both armasm and gnu as support an ldr pseudo instruction for loa...

On Tue, Jun 3, 2014 at 7:59 AM, Nancy <nancydreaming at gmail.com> wrote: >> First, you could switch to ld.gold instead of ld.bfd. It uses much > $ln -s `which gold` /usr/local/bin/ld > >> the idea. I think for autoconf you need ".../configure >> --enable-split-dwarf" to use this. >> > $.../configure --enable-targets=x86 --enable-split-dwarf >

On 25 October 2013 18:33, David Peixotto <dpeixott at codeaurora.org> wrote: > Both armasm and gnu as support an ldr pseudo instruction for loading > constants that lowers to either a mov, movn, or a pc-relative ldr from the > constant pool. It would be great if the llvm integrated assembler could > support this feature as well. > Hi David, As much as I think that it's

Both armasm and gnu as support an ldr pseudo instruction for loading constants that lowers to either a mov, movn, or a pc-relative ldr from the constant pool. It would be great if the llvm integrated assembler could support this feature as well. For example, using gnu as to compile this code: .text foo: ldr r0, =0x1 ldr r0, =-0x1 ldr r0, =0x1000001 ldr r0, =bar

.... is a member of Code Aurora Forum, > hosted by The Linux Foundation**** > > > *From:* Renato Golin [mailto:renato.golin at linaro.org<renato.golin at linaro.org> > ] > *Sent:* Friday, October 25, 2013 1:11 PM > *To:* David Peixotto > *Cc:* LLVM Dev; Logan Chien; Gabor Ballabas; Rafael Espíndola; Richard > Barton; Amara Emerson > *Subject:* Re: Add support for ldr pseudo instruction in ARM integrated > assembler**** > ** ** > On 25 October 2013 18:33, David Peixotto <dpeixott at codeaurora.org> wrote:* > *** > > Both armasm and gnu as suppor...

Hi all, A bunch of us met at EuroLLVM to discuss the planned merge of the two current AArch64 backends in the tree. The primary question was which backend should form the basis of the merge (since the core .td files aren't directly mergeable), with code being cherry-picked from the other on a case-by-case basis. There were factors to consider both ways, but I think the key points of interest