Displaying 5 results from an estimated 5 matches for "backmap".
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backman
2007 Jun 19
2
[LLVMdev] TargetRegisterClass for Physical Register
...ally
> duplicating each register for each different value type it can hold...
The model is correct, I believe. My "yuck" comment was about the necessity
of iterating through all members of all register classes to find the classes a
physical register is in. It would be nice to have a backmap. Perhaps I'll
fiddle around with TableGen and friends and see about adding one if folks
think it's useful.
-Dave
2007 Jun 19
0
[LLVMdev] TargetRegisterClass for Physical Register
On Tue, 19 Jun 2007, David A. Greene wrote:
> The model is correct, I believe. My "yuck" comment was about the necessity
> of iterating through all members of all register classes to find the classes a
> physical register is in. It would be nice to have a backmap. Perhaps I'll
> fiddle around with TableGen and friends and see about adding one if folks
> think it's useful.
Ah, ok. Unless there are a lot of clients, I don't think this is
something tblgen should generate. It's a one to many mapping, and any
particular client can do...
2007 Jun 19
0
[LLVMdev] TargetRegisterClass for Physical Register
On Mon, 18 Jun 2007, David Greene wrote:
> So there are multiple ValueTypes here (the scalar registers each only have
> one corresponding to the bit size of the register). But still, if I have
> physical register MM2, that completely determines its register class.
Right.
> Is there some other architecture where the physical register name/number
> does not completely determine its
2007 Jun 19
1
[LLVMdev] TargetRegisterClass for Physical Register
...Tue, 19 Jun 2007, David A. Greene wrote:
> > The model is correct, I believe. My "yuck" comment was about the
> > necessity of iterating through all members of all register classes to
> > find the classes a physical register is in. It would be nice to have a
> > backmap. Perhaps I'll fiddle around with TableGen and friends and see
> > about adding one if folks think it's useful.
>
> Ah, ok. Unless there are a lot of clients, I don't think this is
> something tblgen should generate. It's a one to many mapping, and any
> particul...
2007 Jun 19
3
[LLVMdev] TargetRegisterClass for Physical Register
On Monday 18 June 2007 19:02, Christopher Lamb wrote:
> Take a look at getPhysicalRegisterRegClass(
> const MRegisterInfo *MRI,
> MVT::ValueType VT,
> unsigned reg)
>
> in ScheduleDAG.cpp.
Yuck. I was afraid of that.
What is the ValueType needed for? Isn't the register id itself an indication
of the ValueType it represents? Where I'm at I