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b9df19a
2012 Apr 25
0
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
Sorry, I meant to say,
I added code to prevent llc from running machine verifier after delay slots
are filled.
MipsInstrInfo::AnalyzeBranch generates incorrect results after delay slots
are filled. Also, it seems that code in MachineVerifier.cpp wasn't written
with architectures that have delay slots in mind.
On Wed, Apr 25, 2012 at 11:59 AM, Akira Hatanaka <ahatanak at gmail.com>
2012 Apr 25
2
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
Hi Anton,
I ran llc with -verify-coalescing. There were no error messages.
Then I added code in MipsPassConfig::addPreEmitPass() to prevent machine
verifier from running post delay -slot-filler, and ran llc again. Again,
there were no error messages.
This is the list of passes run after post-RA scheduling. machine verifier
is run twice after post RA scheduler (and CriticalAntiDepBreaker) is run.