search for: b604f045

Displaying 3 results from an estimated 3 matches for "b604f045".

2012 Mar 02
0
[LLVMdev] Stack alignment on X86 AVX seems incorrect
Cameron, Figure 3.3 on page 16 of www.x86-64.org/documentation/abi.pdf is not normative. See foot note 7 in the same page. Figure 3.4 on page 21 confirms that the use of a frame-pointer is optional. So, if one doesn't use ENTER in the prologue and uses RSP to access local variables, RBP may be used as a calee-saved GPR. -- Evandro Menezes Austin, TX emenezes at
2012 Mar 02
2
[LLVMdev] Stack alignment on X86 AVX seems incorrect
> > At least for 32bit x86 reserving another register as alternative frame > pointer is very heavy. The above would allow normal spill logic to > decide when to keep a reference in register and when not. It also reuses > existing functionality as much as possible. > Hi Joerg, Yes, this was a problem in my implementation also. Empirically, for the chips I work on, reserving the
2012 Mar 02
3
[LLVMdev] Stack alignment on X86 AVX seems incorrect
...ed objects on the stack and then only issue unaligned moves for 256b spills/reloads. Not ideal for performance, but it would work as a stopgap. -Cameron -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120302/b604f045/attachment.html>