search for: b21f06f2

Displaying 2 results from an estimated 2 matches for "b21f06f2".

2013 Mar 13
0
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM
...paired registers is not such a bad idea after all. > The constraints are the right way to do it. There shouldn't be any magic beyond that. -Jim -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130313/b21f06f2/attachment.html>
2013 Mar 13
2
[LLVMdev] Problems with 64-bit register operands of inline asm on ARM
On 13 March 2013 17:57, Jim Grosbach <grosbach at apple.com> wrote: > It seems to me that LLVM doesn’t parse the inline asm body. It just checks > the constraints, (ie. Input/output interface). During ASM writing, it then > binding those constraints to placeholders like %0, %1. > > This is correct. > Ok, so maybe checking all possible ways to require paired registers is