Displaying 5 results from an estimated 5 matches for "avx_fp_cvt_scalar_xs_node_rm_def_v".
2009 Jun 11
2
[LLVMdev] Regular Expressions
...d help?
Sure:
[Top-level specification]
defm CVTSI2SS : sse1_avx_fp_cvt_scalar_xs_scalar64_xs_node_sintrinsic_rm<
0x2D, "cvtsi2ss", sint_to_fp, "cvtsi2ss", "f32", "i32">;
[Meanwhile, down in the guts...]
class fp_cvt_scalar_VXSnrr<
// Parent: avx_fp_cvt_scalar_xs_node_rm_DEF_V#NAME#_128rr
bits<8> opc,
string OpcodeStr,
SDNode OpNode,
string DstType,
string SrcType,
int CustomPatterns = 0,
list<dag> patterns = [],
string asm = ""
>: fp_unary_vxs_n_rm_rr<
opc,
!cast<RegisterClass>(!patsubst("^f([0-9]+)",&q...
2009 Jun 13
0
[LLVMdev] Regular Expressions
...ion]
> defm CVTSI2SS :
> sse1_avx_fp_cvt_scalar_xs_scalar64_xs_node_sintrinsic_rm<
> 0x2D, "cvtsi2ss", sint_to_fp, "cvtsi2ss", "f32", "i32">;
>
> [Meanwhile, down in the guts...]
>
> class fp_cvt_scalar_VXSnrr<
> // Parent: avx_fp_cvt_scalar_xs_node_rm_DEF_V#NAME#_128rr
> bits<8> opc,
> string OpcodeStr,
> SDNode OpNode,
> string DstType,
> string SrcType,
> int CustomPatterns = 0,
> list<dag> patterns = [],
> string asm = ""
>> : fp_unary_vxs_n_rm_rr<
> opc,
> !cast<Register...
2009 Jun 11
0
[LLVMdev] Regular Expressions
On Jun 9, 2009, at 12:39 PM, David Greene wrote:
> On Tuesday 09 June 2009 14:34, Dan Gohman wrote:
>> Can you describe what problem you're trying to solve here? Does it
>> really need Regular Expressions?
>
> Yes. I want TableGen to be able to infer lots of stuff
> programmatically.
> This helps tremendously when specifying things like, oh, AVX. :)
I
2009 Jun 09
3
[LLVMdev] Regular Expressions
On Tuesday 09 June 2009 14:34, Dan Gohman wrote:
> Can you describe what problem you're trying to solve here? Does it
> really need Regular Expressions?
Yes. I want TableGen to be able to infer lots of stuff programmatically.
This helps tremendously when specifying things like, oh, AVX. :)
We could invent our own pattern matching syntax, but why?
2009 Jun 15
2
[LLVMdev] Regular Expressions
...terClass RegClass;
> ...
> }
>
> def X86_f32 : X86ValueType {
> let RegClass = FR32;
> ... };
> def X86_i32 : X86ValueType { ... };
>
> Then change fp_cvt_scalar_VXSnrr to be something like this:
>
>> class fp_cvt_scalar_VXSnrr<
>> // Parent: avx_fp_cvt_scalar_xs_node_rm_DEF_V#NAME#_128rr
>> bits<8> opc,
>> string OpcodeStr,
>> SDNode OpNode,
>> X86ValueType DstType,
>> X86ValueType SrcType,
>> int CustomPatterns = 0,
>> list<dag> patterns = [],
>> string asm = ""
>>> : fp_unary_vxs_n_...