Displaying 2 results from an estimated 2 matches for "availreg".
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availregs
2012 Nov 10
0
[LLVMdev] register scavenger
...more code
vreg2 = add SP, 2000
... = load vreg2 <kill>
R1 = load ScavengeSlot // Restore
... = R1
===> we replace vreg1 with R1 and advance the RS' state by calling
RS->forward(It)
R1 = ...
store R1, ScavengeSlot // Spill
R1 = add SP, 1000
... = load R1 <kill> <-- It AvailRegs {R1}
... // more code
vreg2 = add SP, 2000
... = load vreg2 <kill>
R1 = load ScavengeSlot // Restore
... = R1
The client has to keep liveness current by calling
RS->forward(MachineBasicBlock::iterator).
On Sat, Nov 10, 2012 at 4:17 PM, Reed Kotler <rkotler at mips.com> wrote:
>...
2012 Nov 10
5
[LLVMdev] register scavenger
I'm confused as to the logic used in the register scavenger when it
cannot find a free register.
I would think that it would want to free up the emergency spill slot
immediately after it's use, because otherwise there is a chance of
needing to use the emergency slot again and not be able to.
Instead it tries to restore it only right before register it is freeing up.
Maybe I'm