Displaying 20 results from an estimated 64 matches for "available_cach".
2017 Aug 27
7
[Bug 102430] New: nv4x - memory problems when starting graphical application - logs included
...66 pages, 5464K, 5M)
[ 124.932458] [TTM] placement[0]=0x00070002 (1)
[ 124.936978] [TTM] has_type: 1
[ 124.940283] [TTM] use_type: 1
[ 124.943590] [TTM] flags: 0x0000000A
[ 124.947423] [TTM] gpu_offset: 0x00000000
[ 124.951679] [TTM] size: 131072
[ 124.955074] [TTM] available_caching: 0x00070000
[ 124.959940] [TTM] default_caching: 0x00010000
[ 124.967291] [TTM] Failed to find memory space for buffer 0xffff97a0c738d000
eviction
[ 124.975042] [TTM] No space for ffff97a0c738d000 (1366 pages, 5464K, 5M)
[ 124.981657] [TTM] placement[0]=0x00070002 (1)
[ 124.986176] [T...
2020 Feb 18
5
[PATCH 8/8] drm/ttm: do not keep GPU dependent addresses
...e);
>>> ????? drm_printf(p, "??? flags: 0x%08X\n", man->flags);
>>> -??? drm_printf(p, "??? gpu_offset: 0x%08llX\n", man->gpu_offset);
>>> ????? drm_printf(p, "??? size: %llu\n", man->size);
>>> ????? drm_printf(p, "??? available_caching: 0x%08X\n",
>>> man->available_caching);
>>> ????? drm_printf(p, "??? default_caching: 0x%08X\n",
>>> man->default_caching);
>>> @@ -345,12 +344,6 @@ static int ttm_bo_handle_move_mem(struct
>>> ttm_buffer_object *bo,
>>&...
2020 Feb 18
2
[PATCH 8/8] drm/ttm: do not keep GPU dependent addresses
..._printf(p, "??? flags: 0x%08X\n", man->flags);
>>>>> -??? drm_printf(p, "??? gpu_offset: 0x%08llX\n", man->gpu_offset);
>>>>> ????? drm_printf(p, "??? size: %llu\n", man->size);
>>>>> ????? drm_printf(p, "??? available_caching: 0x%08X\n",
>>>>> man->available_caching);
>>>>> ????? drm_printf(p, "??? default_caching: 0x%08X\n",
>>>>> man->default_caching);
>>>>> @@ -345,12 +344,6 @@ static int ttm_bo_handle_move_mem(struct
>>>>...
2020 Feb 18
2
[PATCH 8/8] drm/ttm: do not keep GPU dependent addresses
...: 0x%08X\n", man->flags);
>>>>>>> -??? drm_printf(p, "??? gpu_offset: 0x%08llX\n", man->gpu_offset);
>>>>>>> ?????? drm_printf(p, "??? size: %llu\n", man->size);
>>>>>>> ?????? drm_printf(p, "??? available_caching: 0x%08X\n",
>>>>>>> man->available_caching);
>>>>>>> ?????? drm_printf(p, "??? default_caching: 0x%08X\n",
>>>>>>> man->default_caching);
>>>>>>> @@ -345,12 +344,6 @@ static int ttm_bo_handl...
2020 Feb 18
0
[PATCH 8/8] drm/ttm: do not keep GPU dependent addresses
...> ????? drm_printf(p, "??? flags: 0x%08X\n", man->flags);
>>>> -??? drm_printf(p, "??? gpu_offset: 0x%08llX\n", man->gpu_offset);
>>>> ????? drm_printf(p, "??? size: %llu\n", man->size);
>>>> ????? drm_printf(p, "??? available_caching: 0x%08X\n",
>>>> man->available_caching);
>>>> ????? drm_printf(p, "??? default_caching: 0x%08X\n",
>>>> man->default_caching);
>>>> @@ -345,12 +344,6 @@ static int ttm_bo_handle_move_mem(struct
>>>> ttm_buffer_o...
2020 Feb 18
0
[PATCH 8/8] drm/ttm: do not keep GPU dependent addresses
...> ????? drm_printf(p, "??? flags: 0x%08X\n", man->flags);
>>>> -??? drm_printf(p, "??? gpu_offset: 0x%08llX\n", man->gpu_offset);
>>>> ????? drm_printf(p, "??? size: %llu\n", man->size);
>>>> ????? drm_printf(p, "??? available_caching: 0x%08X\n",
>>>> man->available_caching);
>>>> ????? drm_printf(p, "??? default_caching: 0x%08X\n",
>>>> man->default_caching);
>>>> @@ -345,12 +344,6 @@ static int ttm_bo_handle_move_mem(struct
>>>> ttm_buffer_obje...
2020 Feb 18
0
[PATCH 8/8] drm/ttm: do not keep GPU dependent addresses
...quot;??? flags: 0x%08X\n", man->flags);
>>>>>> -??? drm_printf(p, "??? gpu_offset: 0x%08llX\n", man->gpu_offset);
>>>>>> ?????? drm_printf(p, "??? size: %llu\n", man->size);
>>>>>> ?????? drm_printf(p, "??? available_caching: 0x%08X\n",
>>>>>> man->available_caching);
>>>>>> ?????? drm_printf(p, "??? default_caching: 0x%08X\n",
>>>>>> man->default_caching);
>>>>>> @@ -345,12 +344,6 @@ static int ttm_bo_handle_move_mem(struct...
2020 Feb 18
0
[PATCH 8/8] drm/ttm: do not keep GPU dependent addresses
...> > > > > > > > -??? drm_printf(p, "??? gpu_offset: 0x%08llX\n", man->gpu_offset);
> > > > > > > > ?????? drm_printf(p, "??? size: %llu\n", man->size);
> > > > > > > > ?????? drm_printf(p, "??? available_caching: 0x%08X\n",
> > > > > > > > man->available_caching);
> > > > > > > > ?????? drm_printf(p, "??? default_caching: 0x%08X\n",
> > > > > > > > man->default_caching);
> > > > > > > >...
2009 Aug 19
1
[PATCH] drm/nouveau: Add a MM for mappable VRAM that isn't usable as scanout.
...bo->mappable)
+ flags |= TTM_PL_FLAG_PRIV0;
+ }
/* Some of the tile_flags have a periodic structure of 24*4096 bytes,
* align to to that as well as the page size. Overallocate memory to
@@ -271,6 +274,21 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
man->available_caching =
man->default_caching = 0;
break;
+ case TTM_PL_PRIV1: /* Mappable but unusable as scanout. */
+ {
+ man->flags = TTM_MEMTYPE_FLAG_FIXED |
+ TTM_MEMTYPE_FLAG_MAPPABLE |
+ TTM_MEMTYPE_FLAG_NEEDS_IOREMAP;
+ man->available_caching = TTM_PL_FLAG_UNCACHED |
+ TTM_...
2014 Jun 27
3
[PATCH v3 0/2] drm: nouveau: memory coherency for ARM
v2 was doing some pretty nasty things with the DMA API, so I took a different
approach for this v3.
As suggested, this version uses ttm_dma_populate() to populate BOs. The reason
for doing this was that it would entitle us to using the DMA sync functions,
but since the memory returned is already coherent anyway, we do not even
need to call these functions anymore.
So this series has turned into
2019 Apr 09
0
[PATCH 13/15] drm/vboxvideo: Convert vboxvideo driver to Simple TTM
...uct vbox_private, ttm.bdev);
> -}
> -
> -static int
> -vbox_bo_init_mem_type(struct ttm_bo_device *bdev, u32 type,
> - struct ttm_mem_type_manager *man)
> -{
> - switch (type) {
> - case TTM_PL_SYSTEM:
> - man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
> - man->available_caching = TTM_PL_MASK_CACHING;
> - man->default_caching = TTM_PL_FLAG_CACHED;
> - break;
> - case TTM_PL_VRAM:
> - man->func = &ttm_bo_manager_func;
> - man->flags = TTM_MEMTYPE_FLAG_FIXED | TTM_MEMTYPE_FLAG_MAPPABLE;
> - man->available_caching = TTM_PL_FLAG_UNCACH...
2014 May 19
2
[RFC] drm/nouveau: disable caching for VRAM BOs on ARM
.../drivers/gpu/drm/nouveau/nouveau_bo.c
index 8db54a217232..9cfb8e61f5c4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -552,7 +552,11 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
TTM_MEMTYPE_FLAG_MAPPABLE;
man->available_caching = TTM_PL_FLAG_UNCACHED |
TTM_PL_FLAG_WC;
+#if defined(__arm__)
+ man->default_caching = TTM_PL_FLAG_UNCACHED;
+#else
man->default_caching = TTM_PL_FLAG_WC;
+#endif
break;
case TTM_PL_TT:
if (nv_device(drm->device)->card_type >= NV_50)
--
1.9.2
2019 Apr 24
0
[PATCH v2 07/17] drm/ast: Convert AST driver to VRAM MM
..._bo_device *bd)
-{
- return container_of(bd, struct ast_private, ttm.bdev);
-}
-
-static int
-ast_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
- struct ttm_mem_type_manager *man)
-{
- switch (type) {
- case TTM_PL_SYSTEM:
- man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
- man->available_caching = TTM_PL_MASK_CACHING;
- man->default_caching = TTM_PL_FLAG_CACHED;
- break;
- case TTM_PL_VRAM:
- man->func = &ttm_bo_manager_func;
- man->flags = TTM_MEMTYPE_FLAG_FIXED |
- TTM_MEMTYPE_FLAG_MAPPABLE;
- man->available_caching = TTM_PL_FLAG_UNCACHED |
- TTM_PL_FLAG_WC;
-...
2019 May 06
0
[PATCH v4 12/19] drm/bochs: Convert bochs driver to VRAM MM
...bo_device *bd)
-{
- return container_of(bd, struct bochs_device, ttm.bdev);
-}
-
-static int bochs_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
- struct ttm_mem_type_manager *man)
-{
- switch (type) {
- case TTM_PL_SYSTEM:
- man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
- man->available_caching = TTM_PL_MASK_CACHING;
- man->default_caching = TTM_PL_FLAG_CACHED;
- break;
- case TTM_PL_VRAM:
- man->func = &ttm_bo_manager_func;
- man->flags = TTM_MEMTYPE_FLAG_FIXED |
- TTM_MEMTYPE_FLAG_MAPPABLE;
- man->available_caching = TTM_PL_FLAG_UNCACHED |
- TTM_PL_FLAG_WC;
-...
2014 Jun 27
5
[PATCH 1/2] drm/nouveau/bar: add noncached ioremap property
...b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -500,18 +500,25 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
man->default_caching = TTM_PL_FLAG_CACHED;
break;
case TTM_PL_VRAM:
+ man->flags = TTM_MEMTYPE_FLAG_FIXED |
+ TTM_MEMTYPE_FLAG_MAPPABLE;
+ man->available_caching = TTM_PL_FLAG_UNCACHED |
+ TTM_PL_FLAG_WC;
+ man->default_caching = TTM_PL_FLAG_WC;
+
if (nv_device(drm->device)->card_type >= NV_50) {
+ /* Some BARs do not support being ioremapped WC */
+ if (nouveau_bar(drm->device)->iomap_uncached) {
+ man->available_cac...
2014 Jun 09
2
[PATCH 4/4] drm/nouveau: introduce CPU cache flushing macro
...need any additional
> synchronization as it will get flushed on pushbuf kickoff anyways.
I tried to go that way, and something interesting happened.
What I did: remove this patch and instead set the following caching
parameters for the TTM_PL_TT case in nouveau_bo_init_mem_type():
man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
man->default_caching = TTM_PL_FLAG_WC;
What happened: no runtime errors as what happened when caching is
enabled. However, many of the vertex and texture buffers seem to be
partially corrupted. In glmark2 the 3d models had many vertices (but
not a...
2019 Apr 24
0
[PATCH v2 05/17] drm: Add VRAM MM, a simple memory manager for dedicated VRAM
...m_tt_init;
+
+ return tt;
+
+err_ttm_tt_init:
+ kfree(tt);
+ return NULL;
+}
+
+static int bo_driver_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
+ struct ttm_mem_type_manager *man)
+{
+ switch (type) {
+ case TTM_PL_SYSTEM:
+ man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
+ man->available_caching = TTM_PL_MASK_CACHING;
+ man->default_caching = TTM_PL_FLAG_CACHED;
+ break;
+ case TTM_PL_VRAM:
+ man->func = &ttm_bo_manager_func;
+ man->flags = TTM_MEMTYPE_FLAG_FIXED |
+ TTM_MEMTYPE_FLAG_MAPPABLE;
+ man->available_caching = TTM_PL_FLAG_UNCACHED |
+ TTM_PL_FL...
2014 May 19
0
[RFC] drm/nouveau: disable caching for VRAM BOs on ARM
...au_bo.c
> index 8db54a217232..9cfb8e61f5c4 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_bo.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
> @@ -552,7 +552,11 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
> TTM_MEMTYPE_FLAG_MAPPABLE;
> man->available_caching = TTM_PL_FLAG_UNCACHED |
> TTM_PL_FLAG_WC;
> +#if defined(__arm__)
> + man->default_caching = TTM_PL_FLAG_UNCACHED;
> +#else
> man->default_caching = TTM_PL_FLAG_WC;
> +#endif
> break;
> case TTM_PL_TT:
> if (nv_device(drm->device)->card_...
2018 Dec 12
0
[PATCH v2 06/18] drm/qxl: use separate offset spaces for the two slots / ttm memory types.
...p;qdev->surfaces_slot;
+ slot->gpu_offset = (uint64_t)type << gpu_offset_shift;
man->func = &ttm_bo_manager_func;
- man->gpu_offset = 0;
+ man->gpu_offset = slot->gpu_offset;
man->flags = TTM_MEMTYPE_FLAG_FIXED |
TTM_MEMTYPE_FLAG_MAPPABLE;
man->available_caching = TTM_PL_MASK_CACHING;
--
2.9.3
2020 May 13
1
[PATCH 2/2] drm/ttm: deprecate AGP support
...on_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
> index 5d50c9edbe80..4f9c4e5f8263 100644
> --- a/drivers/gpu/drm/radeon/radeon_ttm.c
> +++ b/drivers/gpu/drm/radeon/radeon_ttm.c
> @@ -86,7 +86,7 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
> man->available_caching = TTM_PL_MASK_CACHING;
> man->default_caching = TTM_PL_FLAG_CACHED;
> man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
> -#if IS_ENABLED(CONFIG_AGP)
> +#if IS_ENABLED(CONFIG_DRM_TTM_AGP)
> if (rdev->flags & RADEON_IS_AGP) {
> if (!rdev-&g...