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AutoESL is a high-tech startup company providing innovative platform-based communication-centric SystemC/C-to-RTL synthesis technologies (see more in the "About Us" section). Currently AutoESL has several engineering positions open in its headquarter in Los Angeles, California and its R&D cen...

AutoESL (www.autoesl.com) is the leading provider of high-level synthesis for FPGAs and ASICs. The company was founded in 2006 based on advanced technology that was nurtured, developed, and exclusively licensed from UCLA. AutoESL has now deployed this solution at many leading edge system and semiconductor...

I was building llvm2.9 using MinGW64 on windows, msys was 32 bit so I specified --host option for a cross compiling. Following are my configure options: ../llvm2.9/configure --prefix=/home/AutoESL/llvm-obj --host=x86_64-w64-mingw32 --disable-multilib The error: make[1]: Entering directory `/home/AutoESL/llvm-obj/lib/VMCore' make[1]: *** No rule to make target `/usr/home/AutoESL/llvm-obj/BuildTools/Debug/bin/tblgen.exe', needed...

...ger::runOnFunction(llvm::Function&)+0xff)[0x85ce667] opt(llvm::MPPassManager::getOnTheFlyPass(llvm::Pass*, llvm::PassInfo const*, llvm::Function&)+0x62)[0x85ce85e] opt(llvm::AnalysisResolver::findImplPass(llvm::Pass*, llvm::PassInfo const*, llvm::Function&)+0x33)[0x85cbc39] /home/zhiruz/AutoESL/AutoPilot/trunk/build/obj-Linux-x86-g++/Debug/lib/libLLVMHello.so(llvm::LoopInfo& llvm::Pass::getAnalysisID<llvm::LoopInfo>(llvm::PassInfo const*, llvm::Function&)+0x99)[0x12efc7] /home/zhiruz/AutoESL/AutoPilot/trunk/build/obj-Linux-x86-g++/Debug/lib/libLLVMHello.so(llvm::LoopInfo&amp...

Chen, 2011/5/13 陈晓宇 <xychen0921 at gmail.com>: > ../llvm2.9/configure --prefix=/home/AutoESL/llvm-obj >                             --host=x86_64-w64-mingw32 >                             --disable-multilib Please try with "--build=x86_64-w64-mingw32", not "--host". If you would still have any troubles, make sure your x86_64-w64-g++.exe can generate correct PE+...

...ode > To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Message-ID: > <16e5fdf90808121323g1ae2a2e3lb6c5bd62521df621 at mail.gmail.com> > Content-Type: text/plain; charset=ISO-8859-1 > > On Tue, Aug 12, 2008 at 1:24 AM, Sheng Zhou <zhousheng at autoesl.com> wrote: > >> > Hi, >> > >> > The following two segments of code are actually the same, >> > but llvm created different cfg for them. >> > >> > ... > >> > >> > The prime difference is that: cfg of form2 h...

...ks well and a simple 64bit hello-world can run. >> Regards >> >> 2011/5/16 NAKAMURA Takumi <geek4civic at gmail.com> >>> >>> Chen, >>> >>> 2011/5/13 陈晓宇 <xychen0921 at gmail.com>: >>> > ../llvm2.9/configure --prefix=/home/AutoESL/llvm-obj >>> > --host=x86_64-w64-mingw32 >>> > --disable-multilib >>> >>> Please try with "--build=x86_64-w64-mingw32", not "--host". >>> >>> If you would still ha...

Hi, The following two segments of code are actually the same, but llvm created different cfg for them. Form1: 1 #define N 10 2 int test(int A[N][N]) 3 { 4 int i, j; 5 int result =0; 6 for(j=0; j+2<N; ++j) { 7 //for(i=0; i<j && i+j+1<N; i++) { 8 for(i=0; i<j && i<N-j-1; i++) { 9 A[i+j+1][j] = A[j + 2][j-i] + i; 10 } 11 } 12 13 for (i=0; i<N-2; ++i) 14 for (j=0;

Hi John, My project is somewhat inbetween, but closer to the latter. If you are doing something related to synthesis, have you checked xPilot from UCLA? Search "llvm" in this paper <http://www.icims.csl.uiuc.edu/~dchen/xpilot-TechCon2005.pdf> Anyway, thanks for the information! :-) Wenhao On Tue, Mar 3, 2009 at 6:30 AM, <llvmdev-request at cs.uiuc.edu> wrote: > >

There is a strange Writable Instruction Set Computing CPU from Imsys (Sweden) based on FPGA. Is it possible to setup the IMSYS CPU for running applications based on LLVA/LLVM? Thank you. Swedish microprocessor developer Imsys Technologies has released three devices in its reconfigurable family of processors. Unveiled at the Microprocessor Forum in San Jose, each device combines the processor with

> > > Having the final .ll file doesn't help debug this. If you run opt > -analyze -scalar-evolution on the .ll you pasted, it will correctly > print out the loop trip count. > > I've modified llvm-gcc to remove all the passes after indvars. > > I updated my llvm and now it works. >> > Surely the loop trip count is 256, but the Loop::getTripCount()

Hi Nico, Yes, that's true! :-) I just listed it in order of short-comings of the existing compiler. I've been reading up on existing tools, and it would appear that a couple of commercial tools exist, most notably Xilinx AutoESL, which supports C, C++, SystemC and M-code. Others support better C functionality, e.g. c-to-verilog, which does not have the current limitations of Trident. Some of them already use gnu gcc for doing some of the work. So, the conclusion I can draw is that there definitely is scope for i...

Hi, I'm not sure, but I think you should do point 'e' first - unless you want to implement 'a' to 'd' first for 1.5 and then again for 2.4. Best regards, Nico On Dec 29, 2008, at 1:44 PM, Elvis Dowson wrote: > Hi, > Would anyone happen to know if there are any efforts underway > at enhancing the Trident compiler? > > Some of the things that I

Hi, Would anyone happen to know if there are any efforts underway at enhancing the Trident compiler? Some of the things that I would like to add to the Trident compiler are : a. Support for compiling multiple C functions in an input file b. Support for parameter passing c. Support for functions returning results d. Support for a C++ front end, and C++ objects e. Updating the trident

>> 7 for(i=0; i<j && i+j+1<N; i++) { >> >> 8 for(i=0; i<j && i<N-j-1; i++) { >> >> >> Line 7 and Line 8 actually have the same expression, >> > > The expressions are logically similar, but they aren't the same to the > compiler unless some pass that recognizes these types of polynomial > equations and

Hi, Is there anybody familiar with the code in llvm/lib/Transforms/Utils/SimplifyCFG.cpp? The function FoldBranchtoCommonDest() (line 1422) has the comment as following: "/// FoldBranchToCommonDest - If this basic block is ONLY a setcc and a branch, /// and if a predecessor branches to us and one of our successors, fold the /// setcc into the predecessor and use logical operations to pick

> > Are you able to run nightly test ? > Yes, I can run nightly test. > Here is what I see... > > $ make TEST=dbgopt > /Developer/usr/bin//llvm-gcc sse.expandfft.c -g --emit-llvm -c -o > Output/sse.expandfft.bc > /Volumes/Nanpura/mainline/llvm/Debug/bin/opt Output/sse.expandfft.bc - > strip-nondebug -strip-debug -std-compile-opts -strip -f -o Output/ >

Hi Patel, Thanks for your comments, some reply below... (This is the first part, I'll send the second part later) > 2.1 Verification Flow > > The most important of this project is to make the debug information > > do not block any optimization by LLVM transform passes. Here I > > propose a way to determine whether codegen is being impacted by > > debug info.

Hi Patel, Here is second part of my reply. > 2. Proposed Work Plan > > This section defines a proposed work plan to accomplish the > > requirements that we desires. The work plan is broken into several > > distinct phases that follow a logical progression of modifications > > to the LLVM software. > > > > 2.1 Phase 1: Establish the testing