search for: atomic_cont

Displaying 2 results from an estimated 2 matches for "atomic_cont".

2014 May 10
6
[LLVMdev] Replacing Platform Specific IR Codes with Generic Implementation and Introducing Macro Facilities
On 10 May 2014, at 13:53, Tim Northover <t.p.northover at gmail.com> wrote: > It doesn't make sense for everything though, particularly if you want > target-specific IR to simply not exist. What would you map ARM's > "ldrex" to on x86? This isn't a great example. Having load-linked / store-conditional in the IR would make a number of transforms related to
2014 Mar 07
3
[LLVMdev] [RFC] Add second "failure" AtomicOrdering to cmpxchg instruction
.../lib/CodeGen/CGExprScalar.cpp +++ b/lib/CodeGen/CGExprScalar.cpp @@ -1735,8 +1735,9 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV, if (atomicPHI) { llvm::BasicBlock *opBB = Builder.GetInsertBlock(); llvm::BasicBlock *contBB = CGF.createBasicBlock("atomic_cont", CGF.CurFn); - llvm::Value *old = Builder.CreateAtomicCmpXchg(LV.getAddress(), atomicPHI, - CGF.EmitToMemory(value, type), llvm::SequentiallyConsistent); + llvm::Value *old = Builder.CreateAtomicCmpXchg( + LV.getAddress(), atomicPHI, CGF.EmitToMemory(value, type), +...